^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) Kernel driver pcf8591
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) =====================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) Supported chips:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Philips/NXP PCF8591
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) Prefix: 'pcf8591'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) Addresses scanned: none
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) Datasheet: Publicly available at the NXP website
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) http://www.nxp.com/pip/PCF8591_6.html
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) Authors:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) - Aurelien Jarno <aurelien@aurel32.net>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) - valuable contributions by Jan M. Sendler <sendler@sendler.de>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) - Jean Delvare <jdelvare@suse.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) -----------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) The PCF8591 is an 8-bit A/D and D/A converter (4 analog inputs and one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) analog output) for the I2C bus produced by Philips Semiconductors (now NXP).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) It is designed to provide a byte I2C interface to up to 4 separate devices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) The PCF8591 has 4 analog inputs programmable as single-ended or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) differential inputs:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) - mode 0 : four single ended inputs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) Pins AIN0 to AIN3 are single ended inputs for channels 0 to 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) - mode 1 : three differential inputs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) Pins AIN3 is the common negative differential input
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) Pins AIN0 to AIN2 are positive differential inputs for channels 0 to 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) - mode 2 : single ended and differential mixed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) Pins AIN0 and AIN1 are single ended inputs for channels 0 and 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) Pins AIN2 is the positive differential input for channel 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) Pins AIN3 is the negative differential input for channel 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) - mode 3 : two differential inputs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) Pins AIN0 is the positive differential input for channel 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) Pins AIN1 is the negative differential input for channel 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) Pins AIN2 is the positive differential input for channel 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) Pins AIN3 is the negative differential input for channel 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) See the datasheet for details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) Module parameters
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) -----------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * input_mode int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) Analog input mode:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) - 0 = four single ended inputs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) - 1 = three differential inputs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) - 2 = single ended and differential mixed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) - 3 = two differential inputs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) Accessing PCF8591 via /sys interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) -------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) The PCF8591 is plainly impossible to detect! Thus the driver won't even
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) try. You have to explicitly instantiate the device at the relevant
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) address (in the interval [0x48..0x4f]) either through platform data, or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) using the sysfs interface. See Documentation/i2c/instantiating-devices.rst
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) for details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) Directories are being created for each instantiated PCF8591:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) /sys/bus/i2c/devices/<0>-<1>/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) where <0> is the bus the chip is connected to (e. g. i2c-0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) and <1> the chip address ([48..4f])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) Inside these directories, there are such files:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) in0_input, in1_input, in2_input, in3_input, out0_enable, out0_output, name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) Name contains chip name.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) The in0_input, in1_input, in2_input and in3_input files are RO. Reading gives
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) the value of the corresponding channel. Depending on the current analog inputs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) configuration, files in2_input and in3_input may not exist. Values range
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) from 0 to 255 for single ended inputs and -128 to +127 for differential inputs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) (8-bit ADC).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) The out0_enable file is RW. Reading gives "1" for analog output enabled and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) "0" for analog output disabled. Writing accepts "0" and "1" accordingly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) The out0_output file is RW. Writing a number between 0 and 255 (8-bit DAC), send
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) the value to the digital-to-analog converter. Note that a voltage will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) only appears on AOUT pin if aout0_enable equals 1. Reading returns the last
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) value written.
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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