^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) Kernel driver pc87360
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) =====================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) Supported chips:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * National Semiconductor PC87360, PC87363, PC87364, PC87365 and PC87366
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) Prefixes: 'pc87360', 'pc87363', 'pc87364', 'pc87365', 'pc87366'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) Addresses scanned: none, address read from Super I/O config space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) Datasheets: No longer available
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) Authors: Jean Delvare <jdelvare@suse.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) Thanks to Sandeep Mehta, Tonko de Rooy and Daniel Ceregatti for testing.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) Thanks to Rudolf Marek for helping me investigate conversion issues.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) Module Parameters
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) -----------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * init int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) Chip initialization level:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) - 0: None
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) - **1**: Forcibly enable internal voltage and temperature channels,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) except in9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) - 2: Forcibly enable all voltage and temperature channels, except in9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) - 3: Forcibly enable all voltage and temperature channels, including in9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) Note that this parameter has no effect for the PC87360, PC87363 and PC87364
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) chips.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) Also note that for the PC87366, initialization levels 2 and 3 don't enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) all temperature channels, because some of them share pins with each other,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) so they can't be used at the same time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) -----------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) The National Semiconductor PC87360 Super I/O chip contains monitoring and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) PWM control circuitry for two fans. The PC87363 chip is similar, and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) PC87364 chip has monitoring and PWM control for a third fan.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) The National Semiconductor PC87365 and PC87366 Super I/O chips are complete
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) hardware monitoring chipsets, not only controlling and monitoring three fans,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) but also monitoring eleven voltage inputs and two (PC87365) or up to four
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) (PC87366) temperatures.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) =========== ======= ======= ======= ======= =====
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) Chip #vin #fan #pwm #temp devid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) =========== ======= ======= ======= ======= =====
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) PC87360 - 2 2 - 0xE1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) PC87363 - 2 2 - 0xE8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) PC87364 - 3 3 - 0xE4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) PC87365 11 3 3 2 0xE5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) PC87366 11 3 3 3-4 0xE9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) =========== ======= ======= ======= ======= =====
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) The driver assumes that no more than one chip is present, and one of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) standard Super I/O addresses is used (0x2E/0x2F or 0x4E/0x4F)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) Fan Monitoring
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) --------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) Fan rotation speeds are reported in RPM (revolutions per minute). An alarm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) is triggered if the rotation speed has dropped below a programmable limit.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) A different alarm is triggered if the fan speed is too low to be measured.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) Fan readings are affected by a programmable clock divider, giving the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) readings more range or accuracy. Usually, users have to learn how it works,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) but this driver implements dynamic clock divider selection, so you don't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) have to care no more.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) For reference, here are a few values about clock dividers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) =========== =============== =============== ===========
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) slowest accuracy highest
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) measurable around 3000 accurate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) divider speed (RPM) RPM (RPM) speed (RPM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) =========== =============== =============== ===========
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) 1 1882 18 6928
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) 2 941 37 4898
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) 4 470 74 3464
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) 8 235 150 2449
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) =========== =============== =============== ===========
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) For the curious, here is how the values above were computed:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) * slowest measurable speed: clock/(255*divider)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) * accuracy around 3000 RPM: 3000^2/clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) * highest accurate speed: sqrt(clock*100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) The clock speed for the PC87360 family is 480 kHz. I arbitrarily chose 100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) RPM as the lowest acceptable accuracy.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) As mentioned above, you don't have to care about this no more.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) Note that not all RPM values can be represented, even when the best clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) divider is selected. This is not only true for the measured speeds, but
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) also for the programmable low limits, so don't be surprised if you try to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) set, say, fan1_min to 2900 and it finally reads 2909.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) Fan Control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) -----------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) PWM (pulse width modulation) values range from 0 to 255, with 0 meaning
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) that the fan is stopped, and 255 meaning that the fan goes at full speed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) Be extremely careful when changing PWM values. Low PWM values, even
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) non-zero, can stop the fan, which may cause irreversible damage to your
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) hardware if temperature increases too much. When changing PWM values, go
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) step by step and keep an eye on temperatures.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) One user reported problems with PWM. Changing PWM values would break fan
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) speed readings. No explanation nor fix could be found.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) Temperature Monitoring
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) ----------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) Temperatures are reported in degrees Celsius. Each temperature measured has
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) associated low, high and overtemperature limits, each of which triggers an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) alarm when crossed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) The first two temperature channels are external. The third one (PC87366
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) only) is internal.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) The PC87366 has three additional temperature channels, based on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) thermistors (as opposed to thermal diodes for the first three temperature
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) channels). For technical reasons, these channels are held by the VLM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) (voltage level monitor) logical device, not the TMS (temperature
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) measurement) one. As a consequence, these temperatures are exported as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) voltages, and converted into temperatures in user-space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) Note that these three additional channels share their pins with the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) external thermal diode channels, so you (physically) can't use them all at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) the same time. Although it should be possible to mix the two sensor types,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) the documents from National Semiconductor suggest that motherboard
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) manufacturers should choose one type and stick to it. So you will more
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) likely have either channels 1 to 3 (thermal diodes) or 3 to 6 (internal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) thermal diode, and thermistors).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) Voltage Monitoring
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) ------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) Voltages are reported relatively to a reference voltage, either internal or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) external. Some of them (in7:Vsb, in8:Vdd and in10:AVdd) are divided by two
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) internally, you will have to compensate in sensors.conf. Others (in0 to in6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) are likely to be divided externally. The meaning of each of these inputs as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) well as the values of the resistors used for division is left to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) motherboard manufacturers, so you will have to document yourself and edit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) sensors.conf accordingly. National Semiconductor has a document with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) recommended resistor values for some voltages, but this still leaves much
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) room for per motherboard specificities, unfortunately. Even worse,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) motherboard manufacturers don't seem to care about National Semiconductor's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) recommendations.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) Each voltage measured has associated low and high limits, each of which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) triggers an alarm when crossed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) When available, VID inputs are used to provide the nominal CPU Core voltage.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) The driver will default to VRM 9.0, but this can be changed from user-space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) The chipsets can handle two sets of VID inputs (on dual-CPU systems), but
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) the driver will only export one for now. This may change later if there is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) a need.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) General Remarks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) If an alarm triggers, it will remain triggered until the hardware register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) is read at least once. This means that the cause for the alarm may already
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) have disappeared! Note that all hardware registers are read whenever any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) data is read (unless it is less than 2 seconds since the last update, in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) which case cached values are returned instead). As a consequence, when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) a once-only alarm triggers, it may take 2 seconds for it to show, and 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) more seconds for it to disappear.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) Monitoring of in9 isn't enabled at lower init levels (<3) because that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) channel measures the battery voltage (Vbat). It is a known fact that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) repeatedly sampling the battery voltage reduces its lifetime. National
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) Semiconductor smartly designed their chipset so that in9 is sampled only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) once every 1024 sampling cycles (that is every 34 minutes at the default
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) sampling rate), so the effect is attenuated, but still present.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) Limitations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) -----------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) The datasheets suggests that some values (fan mins, fan dividers)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) shouldn't be changed once the monitoring has started, but we ignore that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) recommendation. We'll reconsider if it actually causes trouble.
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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