Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) Kernel driver nsa320_hwmon
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) ==========================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) Supported chips:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)   * Holtek HT46R065 microcontroller with onboard firmware that configures
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 	it to act as a hardware monitor.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)     Prefix: 'nsa320'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)     Addresses scanned: none
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)     Datasheet: Not available, driver was reverse engineered based upon the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 	Zyxel kernel source
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) Author:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)   Adam Baker <linux@baker-net.org.uk>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) -----------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) This chip is known to be used in the Zyxel NSA320 and NSA325 NAS Units and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) also in some variants of the NSA310 but the driver has only been tested
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) on the NSA320. In all of these devices it is connected to the same 3 GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) lines which are used to provide chip select, clock and data lines. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) interface behaves similarly to SPI but at much lower speeds than are normally
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) used for SPI.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) Following each chip select pulse the chip will generate a single 32 bit word
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) that contains 0x55 as a marker to indicate that data is being read correctly,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) followed by an 8 bit fan speed in 100s of RPM and a 16 bit temperature in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) tenths of a degree.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) sysfs-Interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) ============= =================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) temp1_input   temperature input
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) fan1_input    fan speed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) ============= =================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) Notes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) -----
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) The access timings used in the driver are the same as used in the Zyxel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) provided kernel. Testing has shown that if the delay between chip select and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) the first clock pulse is reduced from 100 ms to just under 10ms then the chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) will not produce any output. If the duration of either phase of the clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) is reduced from 100 us to less than 15 us then data pulses are likely to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) read twice corrupting the output. The above analysis is based upon a sample
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) of one unit but suggests that the Zyxel provided delay values include a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) reasonable tolerance.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) The driver incorporates a limit that it will not check for updated values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) faster than once a second. This is because the hardware takes a relatively long
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) time to read the data from the device and when it does it reads both temp and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) fan speed. As the most likely case for two accesses in quick succession is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) to read both of these values avoiding a second read delay is desirable.