^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) Kernel driver MCP3021
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) =====================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) Supported chips:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Microchip Technology MCP3021
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) Prefix: 'mcp3021'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) Datasheet: http://ww1.microchip.com/downloads/en/DeviceDoc/21805a.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Microchip Technology MCP3221
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) Prefix: 'mcp3221'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) Datasheet: http://ww1.microchip.com/downloads/en/DeviceDoc/21732c.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) Authors:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) - Mingkai Hu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) - Sven Schuchmann <schuchmann@schleissheimer.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) -----------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) This driver implements support for the Microchip Technology MCP3021 and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) MCP3221 chip.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) The Microchip Technology Inc. MCP3021 is a successive approximation A/D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) converter (ADC) with 10-bit resolution. The MCP3221 has 12-bit resolution.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) These devices provide one single-ended input with very low power consumption.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) Communication to the MCP3021/MCP3221 is performed using a 2-wire I2C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) compatible interface. Standard (100 kHz) and Fast (400 kHz) I2C modes are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) available. The default I2C device address is 0x4d (contact the Microchip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) factory for additional address options).