^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) Kernel driver adm9240
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) =====================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) Supported chips:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Analog Devices ADM9240
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) Prefix: 'adm9240'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) Addresses scanned: I2C 0x2c - 0x2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) Datasheet: Publicly available at the Analog Devices website
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) http://www.analog.com/UploadedFiles/Data_Sheets/79857778ADM9240_0.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * Dallas Semiconductor DS1780
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) Prefix: 'ds1780'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) Addresses scanned: I2C 0x2c - 0x2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) Datasheet: Publicly available at the Dallas Semiconductor (Maxim) website
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) http://pdfserv.maxim-ic.com/en/ds/DS1780.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * National Semiconductor LM81
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) Prefix: 'lm81'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) Addresses scanned: I2C 0x2c - 0x2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) Datasheet: Publicly available at the National Semiconductor website
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) http://www.national.com/ds.cgi/LM/LM81.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) Authors:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) - Frodo Looijaard <frodol@dds.nl>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) - Philip Edelbrock <phil@netroedge.com>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) - Michiel Rook <michiel@grendelproject.nl>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) - Grant Coady <gcoady.lk@gmail.com> with guidance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) from Jean Delvare <jdelvare@suse.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) Interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) ---------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) The I2C addresses listed above assume BIOS has not changed the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) chip MSB 5-bit address. Each chip reports a unique manufacturer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) identification code as well as the chip revision/stepping level.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) -----------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) [From ADM9240] The ADM9240 is a complete system hardware monitor for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) microprocessor-based systems, providing measurement and limit comparison
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) of up to four power supplies and two processor core voltages, plus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) temperature, two fan speeds and chassis intrusion. Measured values can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) be read out via an I2C-compatible serial System Management Bus, and values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) for limit comparisons can be programmed in over the same serial bus. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) high speed successive approximation ADC allows frequent sampling of all
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) analog channels to ensure a fast interrupt response to any out-of-limit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) measurement.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) The ADM9240, DS1780 and LM81 are register compatible, the following
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) details are common to the three chips. Chip differences are described
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) after this section.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) Measurements
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) ------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) The measurement cycle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) The adm9240 driver will take a measurement reading no faster than once
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) each two seconds. User-space may read sysfs interface faster than the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) measurement update rate and will receive cached data from the most
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) recent measurement.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) ADM9240 has a very fast 320us temperature and voltage measurement cycle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) with independent fan speed measurement cycles counting alternating rising
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) edges of the fan tacho inputs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) DS1780 measurement cycle is about once per second including fan speed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) LM81 measurement cycle is about once per 400ms including fan speed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) The LM81 12-bit extended temperature measurement mode is not supported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) Temperature
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) -----------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) On chip temperature is reported as degrees Celsius as 9-bit signed data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) with resolution of 0.5 degrees Celsius. High and low temperature limits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) are 8-bit signed data with resolution of one degree Celsius.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) Temperature alarm is asserted once the temperature exceeds the high limit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) and is cleared when the temperature falls below the temp1_max_hyst value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) Fan Speed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) ---------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) Two fan tacho inputs are provided, the ADM9240 gates an internal 22.5kHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) clock via a divider to an 8-bit counter. Fan speed (rpm) is calculated by:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) rpm = (22500 * 60) / (count * divider)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) Automatic fan clock divider
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) * User sets 0 to fan_min limit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) - low speed alarm is disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) - fan clock divider not changed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) - auto fan clock adjuster enabled for valid fan speed reading
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * User sets fan_min limit too low
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) - low speed alarm is enabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) - fan clock divider set to max
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) - fan_min set to register value 254 which corresponds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) to 664 rpm on adm9240
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) - low speed alarm will be asserted if fan speed is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) less than minimum measurable speed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) - auto fan clock adjuster disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) * User sets reasonable fan speed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) - low speed alarm is enabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) - fan clock divider set to suit fan_min
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) - auto fan clock adjuster enabled: adjusts fan_min
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) * User sets unreasonably high low fan speed limit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) - resolution of the low speed limit may be reduced
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) - alarm will be asserted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) - auto fan clock adjuster enabled: adjusts fan_min
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) * fan speed may be displayed as zero until the auto fan clock divider
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) adjuster brings fan speed clock divider back into chip measurement
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) range, this will occur within a few measurement cycles.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) Analog Output
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) -------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) An analog output provides a 0 to 1.25 volt signal intended for an external
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) fan speed amplifier circuit. The analog output is set to maximum value on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) power up or reset. This doesn't do much on the test Intel SE440BX-2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) Voltage Monitor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) ^^^^^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) Voltage (IN) measurement is internally scaled:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) === =========== =========== ========= ==========
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) nr label nominal maximum resolution
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) mV mV mV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) === =========== =========== ========= ==========
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 0 +2.5V 2500 3320 13.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 1 Vccp1 2700 3600 14.1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 2 +3.3V 3300 4380 17.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 3 +5V 5000 6640 26.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 4 +12V 12000 15940 62.5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 5 Vccp2 2700 3600 14.1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) === =========== =========== ========= ==========
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) The reading is an unsigned 8-bit value, nominal voltage measurement is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) represented by a reading of 192, being 3/4 of the measurement range.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) An alarm is asserted for any voltage going below or above the set limits.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) The driver reports and accepts voltage limits scaled to the above table.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) VID Monitor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) -----------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) The chip has five inputs to read the 5-bit VID and reports the mV value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) based on detected CPU type.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) Chassis Intrusion
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) -----------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) An alarm is asserted when the CI pin goes active high. The ADM9240
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) Datasheet has an example of an external temperature sensor driving
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) this pin. On an Intel SE440BX-2 the Chassis Intrusion header is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) connected to a normally open switch.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) The ADM9240 provides an internal open drain on this line, and may output
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) a 20 ms active low pulse to reset an external Chassis Intrusion latch.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) Clear the CI latch by writing value 0 to the sysfs intrusion0_alarm file.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) Alarm flags reported as 16-bit word
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) === ============= ==========================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) bit label comment
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) === ============= ==========================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 0 +2.5 V_Error high or low limit exceeded
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 1 VCCP_Error high or low limit exceeded
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 2 +3.3 V_Error high or low limit exceeded
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 3 +5 V_Error high or low limit exceeded
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 4 Temp_Error temperature error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 6 FAN1_Error fan low limit exceeded
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 7 FAN2_Error fan low limit exceeded
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 8 +12 V_Error high or low limit exceeded
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 9 VCCP2_Error high or low limit exceeded
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 12 Chassis_Error CI pin went high
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) === ============= ==========================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) Remaining bits are reserved and thus undefined. It is important to note
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) that alarm bits may be cleared on read, user-space may latch alarms and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) provide the end-user with a method to clear alarm memory.