Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) .. include:: <isonum.txt>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) ============
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) SM501 Driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) ============
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) :Copyright: |copy| 2006, 2007 Simtec Electronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) The Silicon Motion SM501 multimedia companion chip is a multifunction device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) which may provide numerous interfaces including USB host controller USB gadget,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) asynchronous serial ports, audio functions, and a dual display video interface.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) The device may be connected by PCI or local bus with varying functions enabled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) Core
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) ----
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) The core driver in drivers/mfd provides common services for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) drivers which manage the specific hardware blocks. These services
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) include locking for common registers, clock control and resource
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) management.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) The core registers drivers for both PCI and generic bus based
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) chips via the platform device and driver system.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) On detection of a device, the core initialises the chip (which may
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) be specified by the platform data) and then exports the selected
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) peripheral set as platform devices for the specific drivers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) The core re-uses the platform device system as the platform device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) system provides enough features to support the drivers without the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) need to create a new bus-type and the associated code to go with it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) Resources
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) ---------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) Each peripheral has a view of the device which is implicitly narrowed to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) the specific set of resources that peripheral requires in order to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) function correctly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) The centralised memory allocation allows the driver to ensure that the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) maximum possible resource allocation can be made to the video subsystem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) as this is by-far the most resource-sensitive of the on-chip functions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) The primary issue with memory allocation is that of moving the video
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) buffers once a display mode is chosen. Indeed when a video mode change
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) occurs the memory footprint of the video subsystem changes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) Since video memory is difficult to move without changing the display
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) (unless sufficient contiguous memory can be provided for the old and new
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) modes simultaneously) the video driver fully utilises the memory area
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) given to it by aligning fb0 to the start of the area and fb1 to the end
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) of it. Any memory left over in the middle is used for the acceleration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) functions, which are transient and thus their location is less critical
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) as it can be moved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) Configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) -------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) The platform device driver uses a set of platform data to pass
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) configurations through to the core and the subsidiary drivers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) so that there can be support for more than one system carrying
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) an SM501 built into a single kernel image.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) The PCI driver assumes that the PCI card behaves as per the Silicon
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) Motion reference design.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) There is an errata (AB-5) affecting the selection of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) of the M1XCLK and M1CLK frequencies. These two clocks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) must be sourced from the same PLL, although they can then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) be divided down individually. If this is not set, then SM501 may
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) lock and hang the whole system. The driver will refuse to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) attach if the PLL selection is different.