^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) =========================================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) RapidIO subsystem mport driver for IDT Tsi721 PCI Express-to-SRIO bridge.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) =========================================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) 1. Overview
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) ===========
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) This driver implements all currently defined RapidIO mport callback functions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) It supports maintenance read and write operations, inbound and outbound RapidIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) doorbells, inbound maintenance port-writes and RapidIO messaging.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) To generate SRIO maintenance transactions this driver uses one of Tsi721 DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) channels. This mechanism provides access to larger range of hop counts and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) destination IDs without need for changes in outbound window translation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) RapidIO messaging support uses dedicated messaging channels for each mailbox.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) For inbound messages this driver uses destination ID matching to forward messages
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) into the corresponding message queue. Messaging callbacks are implemented to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) fully compatible with RIONET driver (Ethernet over RapidIO messaging services).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 1. Module parameters:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) - 'dbg_level'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) - This parameter allows to control amount of debug information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) generated by this device driver. This parameter is formed by set of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) This parameter can be changed bit masks that correspond to the specific
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) functional block.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) For mask definitions see 'drivers/rapidio/devices/tsi721.h'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) This parameter can be changed dynamically.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) Use CONFIG_RAPIDIO_DEBUG=y to enable debug output at the top level.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) - 'dma_desc_per_channel'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) - This parameter defines number of hardware buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) descriptors allocated for each registered Tsi721 DMA channel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) Its default value is 128.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) - 'dma_txqueue_sz'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) - DMA transactions queue size. Defines number of pending
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) transaction requests that can be accepted by each DMA channel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) Default value is 16.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) - 'dma_sel'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) - DMA channel selection mask. Bitmask that defines which hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) DMA channels (0 ... 6) will be registered with DmaEngine core.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) If bit is set to 1, the corresponding DMA channel will be registered.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) DMA channels not selected by this mask will not be used by this device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) driver. Default value is 0x7f (use all channels).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) - 'pcie_mrrs'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) - override value for PCIe Maximum Read Request Size (MRRS).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) This parameter gives an ability to override MRRS value set during PCIe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) configuration process. Tsi721 supports read request sizes up to 4096B.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) Value for this parameter must be set as defined by PCIe specification:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 0 = 128B, 1 = 256B, 2 = 512B, 3 = 1024B, 4 = 2048B and 5 = 4096B.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) Default value is '-1' (= keep platform setting).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) - 'mbox_sel'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) - RIO messaging MBOX selection mask. This is a bitmask that defines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) messaging MBOXes are managed by this device driver. Mask bits 0 - 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) correspond to MBOX0 - MBOX3. MBOX is under driver's control if the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) corresponding bit is set to '1'. Default value is 0x0f (= all).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 2. Known problems
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) =================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) None.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 3. DMA Engine Support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) =====================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) Tsi721 mport driver supports DMA data transfers between local system memory and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) remote RapidIO devices. This functionality is implemented according to SLAVE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) mode API defined by common Linux kernel DMA Engine framework.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) Depending on system requirements RapidIO DMA operations can be included/excluded
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) by setting CONFIG_RAPIDIO_DMA_ENGINE option. Tsi721 miniport driver uses seven
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) out of eight available BDMA channels to support DMA data transfers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) One BDMA channel is reserved for generation of maintenance read/write requests.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) If Tsi721 mport driver have been built with RAPIDIO_DMA_ENGINE support included,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) this driver will accept DMA-specific module parameter:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) "dma_desc_per_channel"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) - defines number of hardware buffer descriptors used by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) each BDMA channel of Tsi721 (by default - 128).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) 4. Version History
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) ===== ====================================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) 1.1.0 DMA operations re-worked to support data scatter/gather lists larger
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) than hardware buffer descriptors ring.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) 1.0.0 Initial driver release.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) ===== ====================================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) 5. License
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) ===========
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) Copyright(c) 2011 Integrated Device Technology, Inc. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) This program is free software; you can redistribute it and/or modify it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) under the terms of the GNU General Public License as published by the Free
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) Software Foundation; either version 2 of the License, or (at your option)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) any later version.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) This program is distributed in the hope that it will be useful, but WITHOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) You should have received a copy of the GNU General Public License along with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) this program; if not, write to the Free Software Foundation, Inc.,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.