^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) .. SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) ========================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) GPMC (General Purpose Memory Controller)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) ========================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) GPMC is an unified memory controller dedicated to interfacing external
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) memory devices like
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Asynchronous SRAM like memories and application specific integrated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) circuit devices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Asynchronous, synchronous, and page mode burst NOR flash devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) NAND flash
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * Pseudo-SRAM devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) GPMC is found on Texas Instruments SoC's (OMAP based)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) IP details: https://www.ti.com/lit/pdf/spruh73 section 7.1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) GPMC generic timing calculation:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) ================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) GPMC has certain timings that has to be programmed for proper
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) functioning of the peripheral, while peripheral has another set of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) timings. To have peripheral work with gpmc, peripheral timings has to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) be translated to the form gpmc can understand. The way it has to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) translated depends on the connected peripheral. Also there is a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) dependency for certain gpmc timings on gpmc clock frequency. Hence a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) generic timing routine was developed to achieve above requirements.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) Generic routine provides a generic method to calculate gpmc timings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) from gpmc peripheral timings. struct gpmc_device_timings fields has to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) be updated with timings from the datasheet of the peripheral that is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) connected to gpmc. A few of the peripheral timings can be fed either
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) in time or in cycles, provision to handle this scenario has been
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) provided (refer struct gpmc_device_timings definition). It may so
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) happen that timing as specified by peripheral datasheet is not present
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) in timing structure, in this scenario, try to correlate peripheral
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) timing to the one available. If that doesn't work, try to add a new
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) field as required by peripheral, educate generic timing routine to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) handle it, make sure that it does not break any of the existing.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) Then there may be cases where peripheral datasheet doesn't mention
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) certain fields of struct gpmc_device_timings, zero those entries.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) Generic timing routine has been verified to work properly on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) multiple onenand's and tusb6010 peripherals.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) A word of caution: generic timing routine has been developed based
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) on understanding of gpmc timings, peripheral timings, available
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) custom timing routines, a kind of reverse engineering without
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) most of the datasheets & hardware (to be exact none of those supported
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) in mainline having custom timing routine) and by simulation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) gpmc timing dependency on peripheral timings:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) [<gpmc_timing>: <peripheral timing1>, <peripheral timing2> ...]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 1. common
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) cs_on:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) t_ceasu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) adv_on:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) t_avdasu, t_ceavd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 2. sync common
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) sync_clk:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) clk
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) page_burst_access:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) t_bacc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) clk_activation:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) t_ces, t_avds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 3. read async muxed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) adv_rd_off:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) t_avdp_r
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) oe_on:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) t_oeasu, t_aavdh
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) access:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) t_iaa, t_oe, t_ce, t_aa
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) rd_cycle:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) t_rd_cycle, t_cez_r, t_oez
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) 4. read async non-muxed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) adv_rd_off:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) t_avdp_r
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) oe_on:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) t_oeasu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) access:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) t_iaa, t_oe, t_ce, t_aa
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) rd_cycle:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) t_rd_cycle, t_cez_r, t_oez
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) 5. read sync muxed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) adv_rd_off:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) t_avdp_r, t_avdh
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) oe_on:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) t_oeasu, t_ach, cyc_aavdh_oe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) access:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) t_iaa, cyc_iaa, cyc_oe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) rd_cycle:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) t_cez_r, t_oez, t_ce_rdyz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 6. read sync non-muxed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) adv_rd_off:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) t_avdp_r
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) oe_on:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) t_oeasu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) access:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) t_iaa, cyc_iaa, cyc_oe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) rd_cycle:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) t_cez_r, t_oez, t_ce_rdyz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 7. write async muxed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) adv_wr_off:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) t_avdp_w
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) we_on, wr_data_mux_bus:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) t_weasu, t_aavdh, cyc_aavhd_we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) we_off:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) t_wpl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) cs_wr_off:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) t_wph
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) wr_cycle:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) t_cez_w, t_wr_cycle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 8. write async non-muxed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) adv_wr_off:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) t_avdp_w
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) we_on, wr_data_mux_bus:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) t_weasu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) we_off:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) t_wpl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) cs_wr_off:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) t_wph
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) wr_cycle:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) t_cez_w, t_wr_cycle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 9. write sync muxed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) adv_wr_off:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) t_avdp_w, t_avdh
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) we_on, wr_data_mux_bus:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) t_weasu, t_rdyo, t_aavdh, cyc_aavhd_we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) we_off:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) t_wpl, cyc_wpl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) cs_wr_off:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) t_wph
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) wr_cycle:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) t_cez_w, t_ce_rdyz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 10. write sync non-muxed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) adv_wr_off:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) t_avdp_w
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) we_on, wr_data_mux_bus:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) t_weasu, t_rdyo
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) we_off:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) t_wpl, cyc_wpl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) cs_wr_off:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) t_wph
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) wr_cycle:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) t_cez_w, t_ce_rdyz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) Note:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) Many of gpmc timings are dependent on other gpmc timings (a few
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) gpmc timings purely dependent on other gpmc timings, a reason that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) some of the gpmc timings are missing above), and it will result in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) indirect dependency of peripheral timings to gpmc timings other than
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) mentioned above, refer timing routine for more details. To know what
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) these peripheral timings correspond to, please see explanations in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) struct gpmc_device_timings definition. And for gpmc timings refer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) IP details (link above).
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