^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) .. SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) The cx2341x driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) ==================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) Memory at cx2341x chips
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) -----------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) This section describes the cx2341x memory map and documents some of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) register space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) .. note:: the memory long words are little-endian ('intel format').
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) .. warning::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) This information was figured out from searching through the memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) and registers, this information may not be correct and is certainly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) not complete, and was not derived from anything more than searching
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) through the memory space with commands like:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) .. code-block:: none
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) ivtvctl -O min=0x02000000,max=0x020000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) So take this as is, I'm always searching for more stuff, it's a large
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) register space :-).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) Memory Map
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) ~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) The cx2341x exposes its entire 64M memory space to the PCI host via the PCI BAR0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) (Base Address Register 0). The addresses here are offsets relative to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) address held in BAR0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) .. code-block:: none
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 0x00000000-0x00ffffff Encoder memory space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 0x00000000-0x0003ffff Encode.rom
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) ???-??? MPEG buffer(s)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) ???-??? Raw video capture buffer(s)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) ???-??? Raw audio capture buffer(s)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) ???-??? Display buffers (6 or 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 0x01000000-0x01ffffff Decoder memory space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 0x01000000-0x0103ffff Decode.rom
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) ???-??? MPEG buffers(s)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 0x0114b000-0x0115afff Audio.rom (deprecated?)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 0x02000000-0x0200ffff Register Space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) Registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) ~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) The registers occupy the 64k space starting at the 0x02000000 offset from BAR0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) All of these registers are 32 bits wide.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .. code-block:: none
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) DMA Registers 0x000-0xff:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 0x00 - Control:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 0=reset/cancel, 1=read, 2=write, 4=stop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 0x04 - DMA status:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 1=read busy, 2=write busy, 4=read error, 8=write error, 16=link list error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 0x08 - pci DMA pointer for read link list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 0x0c - pci DMA pointer for write link list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 0x10 - read/write DMA enable:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 1=read enable, 2=write enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 0x14 - always 0xffffffff, if set any lower instability occurs, 0x00 crashes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 0x18 - ??
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 0x1c - always 0x20 or 32, smaller values slow down DMA transactions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 0x20 - always value of 0x780a010a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 0x24-0x3c - usually just random values???
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 0x40 - Interrupt status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 0x44 - Write a bit here and shows up in Interrupt status 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 0x48 - Interrupt Mask
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 0x4C - always value of 0xfffdffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) if changed to 0xffffffff DMA write interrupts break.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) 0x50 - always 0xffffffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) 0x54 - always 0xffffffff (0x4c, 0x50, 0x54 seem like interrupt masks, are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) 3 processors on chip, Java ones, VPU, SPU, APU, maybe these are the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) interrupt masks???).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) 0x60-0x7C - random values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) 0x80 - first write linked list reg, for Encoder Memory addr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) 0x84 - first write linked list reg, for pci memory addr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) 0x88 - first write linked list reg, for length of buffer in memory addr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) (|0x80000000 or this for last link)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) 0x8c-0xdc - rest of write linked list reg, 8 sets of 3 total, DMA goes here
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) from linked list addr in reg 0x0c, firmware must push through or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) something.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) 0xe0 - first (and only) read linked list reg, for pci memory addr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) 0xe4 - first (and only) read linked list reg, for Decoder memory addr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) 0xe8 - first (and only) read linked list reg, for length of buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) 0xec-0xff - Nothing seems to be in these registers, 0xec-f4 are 0x00000000.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) Memory locations for Encoder Buffers 0x700-0x7ff:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) These registers show offsets of memory locations pertaining to each
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) buffer area used for encoding, have to shift them by <<1 first.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) - 0x07F8: Encoder SDRAM refresh
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) - 0x07FC: Encoder SDRAM pre-charge
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) Memory locations for Decoder Buffers 0x800-0x8ff:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) These registers show offsets of memory locations pertaining to each
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) buffer area used for decoding, have to shift them by <<1 first.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) - 0x08F8: Decoder SDRAM refresh
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) - 0x08FC: Decoder SDRAM pre-charge
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) Other memory locations:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) - 0x2800: Video Display Module control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) - 0x2D00: AO (audio output?) control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) - 0x2D24: Bytes Flushed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) - 0x7000: LSB I2C write clock bit (inverted)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) - 0x7004: LSB I2C write data bit (inverted)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) - 0x7008: LSB I2C read clock bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) - 0x700c: LSB I2C read data bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) - 0x9008: GPIO get input state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) - 0x900c: GPIO set output state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) - 0x9020: GPIO direction (Bit7 (GPIO 0..7) - 0:input, 1:output)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) - 0x9050: SPU control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) - 0x9054: Reset HW blocks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) - 0x9058: VPU control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) - 0xA018: Bit6: interrupt pending?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) - 0xA064: APU command
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) Interrupt Status Register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) ~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) The definition of the bits in the interrupt status register 0x0040, and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) interrupt mask 0x0048. If a bit is cleared in the mask, then we want our ISR to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) execute.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) - bit 31 Encoder Start Capture
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) - bit 30 Encoder EOS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) - bit 29 Encoder VBI capture
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) - bit 28 Encoder Video Input Module reset event
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) - bit 27 Encoder DMA complete
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) - bit 24 Decoder audio mode change detection event (through event notification)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) - bit 22 Decoder data request
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) - bit 20 Decoder DMA complete
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) - bit 19 Decoder VBI re-insertion
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) - bit 18 Decoder DMA err (linked-list bad)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) Missing documentation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) ---------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) - Encoder API post(?)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) - Decoder API post(?)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) - Decoder VTRACE event
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) The cx2341x firmware upload
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) ---------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) This document describes how to upload the cx2341x firmware to the card.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) How to find
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) ~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) See the web pages of the various projects that uses this chip for information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) on how to obtain the firmware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) The firmware stored in a Windows driver can be detected as follows:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) - Each firmware image is 256k bytes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) - The 1st 32-bit word of the Encoder image is 0x0000da7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) - The 1st 32-bit word of the Decoder image is 0x00003a7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) - The 2nd 32-bit word of both images is 0xaa55bb66
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) How to load
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) ~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) - Issue the FWapi command to stop the encoder if it is running. Wait for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) command to complete.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) - Issue the FWapi command to stop the decoder if it is running. Wait for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) command to complete.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) - Issue the I2C command to the digitizer to stop emitting VSYNC events.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) - Issue the FWapi command to halt the encoder's firmware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) - Sleep for 10ms.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) - Issue the FWapi command to halt the decoder's firmware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) - Sleep for 10ms.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) - Write 0x00000000 to register 0x2800 to stop the Video Display Module.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) - Write 0x00000005 to register 0x2D00 to stop the AO (audio output?).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) - Write 0x00000000 to register 0xA064 to ping? the APU.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) - Write 0xFFFFFFFE to register 0x9058 to stop the VPU.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) - Write 0xFFFFFFFF to register 0x9054 to reset the HW blocks.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) - Write 0x00000001 to register 0x9050 to stop the SPU.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) - Sleep for 10ms.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) - Write 0x0000001A to register 0x07FC to init the Encoder SDRAM's pre-charge.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) - Write 0x80000640 to register 0x07F8 to init the Encoder SDRAM's refresh to 1us.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) - Write 0x0000001A to register 0x08FC to init the Decoder SDRAM's pre-charge.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) - Write 0x80000640 to register 0x08F8 to init the Decoder SDRAM's refresh to 1us.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) - Sleep for 512ms. (600ms is recommended)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) - Transfer the encoder's firmware image to offset 0 in Encoder memory space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) - Transfer the decoder's firmware image to offset 0 in Decoder memory space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) - Use a read-modify-write operation to Clear bit 0 of register 0x9050 to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) re-enable the SPU.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) - Sleep for 1 second.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) - Use a read-modify-write operation to Clear bits 3 and 0 of register 0x9058
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) to re-enable the VPU.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) - Sleep for 1 second.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) - Issue status API commands to both firmware images to verify.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) How to call the firmware API
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) ----------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) The preferred calling convention is known as the firmware mailbox. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) mailboxes are basically a fixed length array that serves as the call-stack.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) Firmware mailboxes can be located by searching the encoder and decoder memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) for a 16 byte signature. That signature will be located on a 256-byte boundary.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) Signature:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) .. code-block:: none
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 0x78, 0x56, 0x34, 0x12, 0x12, 0x78, 0x56, 0x34,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 0x34, 0x12, 0x78, 0x56, 0x56, 0x34, 0x12, 0x78
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) The firmware implements 20 mailboxes of 20 32-bit words. The first 10 are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) reserved for API calls. The second 10 are used by the firmware for event
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) notification.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) ====== =================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) Index Name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) ====== =================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 0 Flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 1 Command
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 2 Return value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 3 Timeout
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 4-19 Parameter/Result
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) ====== =================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) The flags are defined in the following table. The direction is from the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) perspective of the firmware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) ==== ========== ============================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) Bit Direction Purpose
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) ==== ========== ============================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 2 O Firmware has processed the command.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 1 I Driver has finished setting the parameters.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 0 I Driver is using this mailbox.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) ==== ========== ============================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) The command is a 32-bit enumerator. The API specifics may be found in this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) chapter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) The return value is a 32-bit enumerator. Only two values are currently defined:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) - 0=success
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) - -1=command undefined.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) There are 16 parameters/results 32-bit fields. The driver populates these fields
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) with values for all the parameters required by the call. The driver overwrites
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) these fields with result values returned by the call.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) The timeout value protects the card from a hung driver thread. If the driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) doesn't handle the completed call within the timeout specified, the firmware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) will reset that mailbox.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) To make an API call, the driver iterates over each mailbox looking for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) first one available (bit 0 has been cleared). The driver sets that bit, fills
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) in the command enumerator, the timeout value and any required parameters. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) driver then sets the parameter ready bit (bit 1). The firmware scans the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) mailboxes for pending commands, processes them, sets the result code, populates
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) the result value array with that call's return values and sets the call
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) complete bit (bit 2). Once bit 2 is set, the driver should retrieve the results
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) and clear all the flags. If the driver does not perform this task within the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) time set in the timeout register, the firmware will reset that mailbox.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) Event notifications are sent from the firmware to the host. The host tells the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) firmware which events it is interested in via an API call. That call tells the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) firmware which notification mailbox to use. The firmware signals the host via
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) an interrupt. Only the 16 Results fields are used, the Flags, Command, Return
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) value and Timeout words are not used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) OSD firmware API description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) ----------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) .. note:: this API is part of the decoder firmware, so it's cx23415 only.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) CX2341X_OSD_GET_FRAMEBUFFER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) ~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) Enum: 65/0x41
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) Return base and length of contiguous OSD memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) Result[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) OSD base address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) Result[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) OSD length
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) CX2341X_OSD_GET_PIXEL_FORMAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) Enum: 66/0x42
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) Query OSD format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) Result[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 0=8bit index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 1=16bit RGB 5:6:5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 2=16bit ARGB 1:5:5:5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 3=16bit ARGB 1:4:4:4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 4=32bit ARGB 8:8:8:8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) CX2341X_OSD_SET_PIXEL_FORMAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) Enum: 67/0x43
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) Assign pixel format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) - 0=8bit index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) - 1=16bit RGB 5:6:5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) - 2=16bit ARGB 1:5:5:5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) - 3=16bit ARGB 1:4:4:4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) - 4=32bit ARGB 8:8:8:8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) CX2341X_OSD_GET_STATE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) ~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) Enum: 68/0x44
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) Query OSD state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) Result[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) - Bit 0 0=off, 1=on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) - Bits 1:2 alpha control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) - Bits 3:5 pixel format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) CX2341X_OSD_SET_STATE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) ~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) Enum: 69/0x45
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) OSD switch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 0=off, 1=on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) CX2341X_OSD_GET_OSD_COORDS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) ~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) Enum: 70/0x46
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) Retrieve coordinates of OSD area blended with video
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) Result[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) OSD buffer address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) Result[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) Stride in pixels
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) Result[2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) Lines in OSD buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) Result[3]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) Horizontal offset in buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) Result[4]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) Vertical offset in buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) CX2341X_OSD_SET_OSD_COORDS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) ~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) Enum: 71/0x47
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) Assign the coordinates of the OSD area to blend with video
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) buffer address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) Param[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) buffer stride in pixels
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) Param[2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) lines in buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) Param[3]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) horizontal offset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) Param[4]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) vertical offset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) CX2341X_OSD_GET_SCREEN_COORDS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) Enum: 72/0x48
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) Retrieve OSD screen area coordinates
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) Result[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) top left horizontal offset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) Result[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) top left vertical offset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) Result[2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) bottom right horizontal offset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) Result[3]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) bottom right vertical offset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) CX2341X_OSD_SET_SCREEN_COORDS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) Enum: 73/0x49
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) Assign the coordinates of the screen area to blend with video
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) top left horizontal offset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) Param[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) top left vertical offset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) Param[2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) bottom left horizontal offset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) Param[3]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) bottom left vertical offset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) CX2341X_OSD_GET_GLOBAL_ALPHA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) Enum: 74/0x4A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) Retrieve OSD global alpha
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) Result[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) global alpha: 0=off, 1=on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) Result[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) bits 0:7 global alpha
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) CX2341X_OSD_SET_GLOBAL_ALPHA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) Enum: 75/0x4B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) Update global alpha
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) global alpha: 0=off, 1=on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) Param[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) global alpha (8 bits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) Param[2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) local alpha: 0=on, 1=off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) CX2341X_OSD_SET_BLEND_COORDS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) Enum: 78/0x4C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) Move start of blending area within display buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) horizontal offset in buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) Param[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) vertical offset in buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) CX2341X_OSD_GET_FLICKER_STATE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) Enum: 79/0x4F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) Retrieve flicker reduction module state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) Result[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) flicker state: 0=off, 1=on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) CX2341X_OSD_SET_FLICKER_STATE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) Enum: 80/0x50
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) Set flicker reduction module state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) State: 0=off, 1=on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) CX2341X_OSD_BLT_COPY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) ~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) Enum: 82/0x52
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) BLT copy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) .. code-block:: none
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) '0000' zero
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) '0001' ~destination AND ~source
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) '0010' ~destination AND source
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) '0011' ~destination
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) '0100' destination AND ~source
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) '0101' ~source
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) '0110' destination XOR source
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) '0111' ~destination OR ~source
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) '1000' ~destination AND ~source
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) '1001' destination XNOR source
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) '1010' source
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) '1011' ~destination OR source
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) '1100' destination
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) '1101' destination OR ~source
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) '1110' destination OR source
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) '1111' one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) Param[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) Resulting alpha blending
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) - '01' source_alpha
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) - '10' destination_alpha
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) - '11' source_alpha*destination_alpha+1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) (zero if both source and destination alpha are zero)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) Param[2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) .. code-block:: none
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) '00' output_pixel = source_pixel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) '01' if source_alpha=0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) output_pixel = destination_pixel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) if 256 > source_alpha > 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) output_pixel = ((source_alpha + 1)*source_pixel +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) (255 - source_alpha)*destination_pixel)/256
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) '10' if destination_alpha=0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) output_pixel = source_pixel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) if 255 > destination_alpha > 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) output_pixel = ((255 - destination_alpha)*source_pixel +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) (destination_alpha + 1)*destination_pixel)/256
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) '11' if source_alpha=0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) source_temp = 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) if source_alpha=255:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) source_temp = source_pixel*256
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) if 255 > source_alpha > 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) source_temp = source_pixel*(source_alpha + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) if destination_alpha=0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) destination_temp = 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) if destination_alpha=255:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) destination_temp = destination_pixel*256
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) if 255 > destination_alpha > 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) destination_temp = destination_pixel*(destination_alpha + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) output_pixel = (source_temp + destination_temp)/256
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) Param[3]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) width
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) Param[4]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) height
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) Param[5]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) destination pixel mask
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) Param[6]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) destination rectangle start address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) Param[7]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) destination stride in dwords
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) Param[8]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) source stride in dwords
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) Param[9]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) source rectangle start address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) CX2341X_OSD_BLT_FILL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) ~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) Enum: 83/0x53
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) BLT fill color
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) Same as Param[0] on API 0x52
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) Param[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) Same as Param[1] on API 0x52
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) Param[2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) Same as Param[2] on API 0x52
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) Param[3]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) width
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) Param[4]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) height
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) Param[5]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) destination pixel mask
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) Param[6]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) destination rectangle start address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) Param[7]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) destination stride in dwords
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) Param[8]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) color fill value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) CX2341X_OSD_BLT_TEXT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) ~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) Enum: 84/0x54
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) BLT for 8 bit alpha text source
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) Same as Param[0] on API 0x52
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) Param[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) Same as Param[1] on API 0x52
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) Param[2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) Same as Param[2] on API 0x52
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) Param[3]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) width
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) Param[4]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) height
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) Param[5]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) destination pixel mask
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) Param[6]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) destination rectangle start address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) Param[7]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) destination stride in dwords
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) Param[8]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) source stride in dwords
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) Param[9]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) source rectangle start address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) Param[10]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) color fill value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) CX2341X_OSD_SET_FRAMEBUFFER_WINDOW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) Enum: 86/0x56
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) Positions the main output window on the screen. The coordinates must be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) such that the entire window fits on the screen.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) window width
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) Param[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) window height
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) Param[2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) top left window corner horizontal offset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) Param[3]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) top left window corner vertical offset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) CX2341X_OSD_SET_CHROMA_KEY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) ~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) Enum: 96/0x60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) Chroma key switch and color
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) state: 0=off, 1=on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) Param[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) color
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) CX2341X_OSD_GET_ALPHA_CONTENT_INDEX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) Enum: 97/0x61
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) Retrieve alpha content index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) Result[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) alpha content index, Range 0:15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) CX2341X_OSD_SET_ALPHA_CONTENT_INDEX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) Enum: 98/0x62
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) Assign alpha content index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) alpha content index, range 0:15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) Encoder firmware API description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) --------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) CX2341X_ENC_PING_FW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) ~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) Enum: 128/0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) Does nothing. Can be used to check if the firmware is responding.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) CX2341X_ENC_START_CAPTURE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) ~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) Enum: 129/0x81
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) Commences the capture of video, audio and/or VBI data. All encoding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) parameters must be initialized prior to this API call. Captures frames
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) continuously or until a predefined number of frames have been captured.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) Capture stream type:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) - 0=MPEG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) - 1=Raw
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) - 2=Raw passthrough
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) - 3=VBI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) Param[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) Bitmask:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) - Bit 0 when set, captures YUV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) - Bit 1 when set, captures PCM audio
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) - Bit 2 when set, captures VBI (same as param[0]=3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) - Bit 3 when set, the capture destination is the decoder
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) (same as param[0]=2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) - Bit 4 when set, the capture destination is the host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) .. note:: this parameter is only meaningful for RAW capture type.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) CX2341X_ENC_STOP_CAPTURE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) ~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) Enum: 130/0x82
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) Ends a capture in progress
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) - 0=stop at end of GOP (generates IRQ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) - 1=stop immediate (no IRQ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) Param[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) Stream type to stop, see param[0] of API 0x81
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) Param[2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) Subtype, see param[1] of API 0x81
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) CX2341X_ENC_SET_AUDIO_ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) ~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) Enum: 137/0x89
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) Assigns the transport stream ID of the encoded audio stream
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) Audio Stream ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) CX2341X_ENC_SET_VIDEO_ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) ~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) Enum: 139/0x8B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) Set video transport stream ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) Video stream ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) CX2341X_ENC_SET_PCR_ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) ~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) Enum: 141/0x8D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) Assigns the transport stream ID for PCR packets
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) PCR Stream ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) CX2341X_ENC_SET_FRAME_RATE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) ~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) Enum: 143/0x8F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) Set video frames per second. Change occurs at start of new GOP.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) - 0=30fps
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) - 1=25fps
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) CX2341X_ENC_SET_FRAME_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) ~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) Enum: 145/0x91
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) Select video stream encoding resolution.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) Height in lines. Default 480
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) Param[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) Width in pixels. Default 720
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) CX2341X_ENC_SET_BIT_RATE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) ~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) Enum: 149/0x95
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) Assign average video stream bitrate.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) 0=variable bitrate, 1=constant bitrate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) Param[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) bitrate in bits per second
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) Param[2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) peak bitrate in bits per second, divided by 400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) Param[3]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) Mux bitrate in bits per second, divided by 400. May be 0 (default).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) Param[4]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) Rate Control VBR Padding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) Param[5]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) VBV Buffer used by encoder
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) .. note::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) #) Param\[3\] and Param\[4\] seem to be always 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) #) Param\[5\] doesn't seem to be used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) CX2341X_ENC_SET_GOP_PROPERTIES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) Enum: 151/0x97
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) Setup the GOP structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) GOP size (maximum is 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) Param[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) Number of B frames between the I and P frame, plus 1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) For example: IBBPBBPBBPBB --> GOP size: 12, number of B frames: 2+1 = 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) .. note::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) GOP size must be a multiple of (B-frames + 1).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) CX2341X_ENC_SET_ASPECT_RATIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) Enum: 153/0x99
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) Sets the encoding aspect ratio. Changes in the aspect ratio take effect
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) at the start of the next GOP.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) - '0000' forbidden
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) - '0001' 1:1 square
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) - '0010' 4:3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) - '0011' 16:9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) - '0100' 2.21:1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) - '0101' to '1111' reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) CX2341X_ENC_SET_DNR_FILTER_MODE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) Enum: 155/0x9B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) Assign Dynamic Noise Reduction operating mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) Bit0: Spatial filter, set=auto, clear=manual
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) Bit1: Temporal filter, set=auto, clear=manual
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) Param[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) Median filter:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) - 0=Disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) - 1=Horizontal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) - 2=Vertical
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) - 3=Horiz/Vert
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) - 4=Diagonal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) CX2341X_ENC_SET_DNR_FILTER_PROPS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) Enum: 157/0x9D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) These Dynamic Noise Reduction filter values are only meaningful when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) the respective filter is set to "manual" (See API 0x9B)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) Spatial filter: default 0, range 0:15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) Param[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) Temporal filter: default 0, range 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) CX2341X_ENC_SET_CORING_LEVELS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) Enum: 159/0x9F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) Assign Dynamic Noise Reduction median filter properties.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) Threshold above which the luminance median filter is enabled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) Default: 0, range 0:255
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) Param[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) Threshold below which the luminance median filter is enabled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) Default: 255, range 0:255
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) Param[2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) Threshold above which the chrominance median filter is enabled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) Default: 0, range 0:255
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) Param[3]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) Threshold below which the chrominance median filter is enabled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) Default: 255, range 0:255
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) CX2341X_ENC_SET_SPATIAL_FILTER_TYPE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) Enum: 161/0xA1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) Assign spatial prefilter parameters
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) Luminance filter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) - 0=Off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) - 1=1D Horizontal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) - 2=1D Vertical
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) - 3=2D H/V Separable (default)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) - 4=2D Symmetric non-separable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) Param[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) Chrominance filter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) - 0=Off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) - 1=1D Horizontal (default)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) CX2341X_ENC_SET_VBI_LINE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) ~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) Enum: 183/0xB7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) Selects VBI line number.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) - Bits 0:4 line number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) - Bit 31 0=top_field, 1=bottom_field
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) - Bits 0:31 all set specifies "all lines"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) Param[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) VBI line information features: 0=disabled, 1=enabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) Param[2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) Slicing: 0=None, 1=Closed Caption
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) Almost certainly not implemented. Set to 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) Param[3]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) Luminance samples in this line.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) Almost certainly not implemented. Set to 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) Param[4]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) Chrominance samples in this line
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) Almost certainly not implemented. Set to 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) CX2341X_ENC_SET_STREAM_TYPE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) ~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) Enum: 185/0xB9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) Assign stream type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) .. note::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) Transport stream is not working in recent firmwares.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) And in older firmwares the timestamps in the TS seem to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) unreliable.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) - 0=Program stream
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) - 1=Transport stream
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) - 2=MPEG1 stream
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) - 3=PES A/V stream
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) - 5=PES Video stream
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) - 7=PES Audio stream
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) - 10=DVD stream
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) - 11=VCD stream
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) - 12=SVCD stream
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) - 13=DVD_S1 stream
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) - 14=DVD_S2 stream
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) CX2341X_ENC_SET_OUTPUT_PORT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) ~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) Enum: 187/0xBB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) Assign stream output port. Normally 0 when the data is copied through
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) the PCI bus (DMA), and 1 when the data is streamed to another chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) (pvrusb and cx88-blackbird).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) - 0=Memory (default)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) - 1=Streaming
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) - 2=Serial
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) Param[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) Unknown, but leaving this to 0 seems to work best. Indications are that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) this might have to do with USB support, although passing anything but 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) only breaks things.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) CX2341X_ENC_SET_AUDIO_PROPERTIES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) Enum: 189/0xBD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) Set audio stream properties, may be called while encoding is in progress.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) .. note::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) All bitfields are consistent with ISO11172 documentation except
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) bits 2:3 which ISO docs define as:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) - '11' Layer I
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) - '10' Layer II
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) - '01' Layer III
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) - '00' Undefined
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) This discrepancy may indicate a possible error in the documentation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) Testing indicated that only Layer II is actually working, and that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) the minimum bitrate should be 192 kbps.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) Bitmask:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) .. code-block:: none
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) 0:1 '00' 44.1Khz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) '01' 48Khz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) '10' 32Khz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) '11' reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) 2:3 '01'=Layer I
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) '10'=Layer II
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) 4:7 Bitrate:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) Index | Layer I | Layer II
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) ------+-------------+------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) '0000' | free format | free format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) '0001' | 32 kbit/s | 32 kbit/s
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) '0010' | 64 kbit/s | 48 kbit/s
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) '0011' | 96 kbit/s | 56 kbit/s
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) '0100' | 128 kbit/s | 64 kbit/s
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) '0101' | 160 kbit/s | 80 kbit/s
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) '0110' | 192 kbit/s | 96 kbit/s
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) '0111' | 224 kbit/s | 112 kbit/s
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) '1000' | 256 kbit/s | 128 kbit/s
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) '1001' | 288 kbit/s | 160 kbit/s
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) '1010' | 320 kbit/s | 192 kbit/s
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) '1011' | 352 kbit/s | 224 kbit/s
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) '1100' | 384 kbit/s | 256 kbit/s
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) '1101' | 416 kbit/s | 320 kbit/s
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) '1110' | 448 kbit/s | 384 kbit/s
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) .. note::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) For Layer II, not all combinations of total bitrate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) and mode are allowed. See ISO11172-3 3-Annex B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) Table 3-B.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) 8:9 '00'=Stereo
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) '01'=JointStereo
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) '10'=Dual
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) '11'=Mono
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) .. note::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) The cx23415 cannot decode Joint Stereo properly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) 10:11 Mode Extension used in joint_stereo mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) In Layer I and II they indicate which subbands are in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) intensity_stereo. All other subbands are coded in stereo.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) '00' subbands 4-31 in intensity_stereo, bound==4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) '01' subbands 8-31 in intensity_stereo, bound==8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) '10' subbands 12-31 in intensity_stereo, bound==12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) '11' subbands 16-31 in intensity_stereo, bound==16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) 12:13 Emphasis:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) '00' None
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) '01' 50/15uS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) '10' reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) '11' CCITT J.17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) 14 CRC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) '0' off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) '1' on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) 15 Copyright:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) '0' off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) '1' on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) 16 Generation:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) '0' copy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) '1' original
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) CX2341X_ENC_HALT_FW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) ~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) Enum: 195/0xC3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) The firmware is halted and no further API calls are serviced until the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) firmware is uploaded again.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) CX2341X_ENC_GET_VERSION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) ~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) Enum: 196/0xC4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) Returns the version of the encoder firmware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) Result[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) Version bitmask:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) - Bits 0:15 build
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) - Bits 16:23 minor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) - Bits 24:31 major
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) CX2341X_ENC_SET_GOP_CLOSURE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) ~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) Enum: 197/0xC5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) Assigns the GOP open/close property.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) - 0=Open
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) - 1=Closed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) CX2341X_ENC_GET_SEQ_END
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) ~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) Enum: 198/0xC6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) Obtains the sequence end code of the encoder's buffer. When a capture
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) is started a number of interrupts are still generated, the last of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) which will have Result[0] set to 1 and Result[1] will contain the size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) of the buffer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) Result[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) State of the transfer (1 if last buffer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) Result[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) If Result[0] is 1, this contains the size of the last buffer, undefined
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) otherwise.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) CX2341X_ENC_SET_PGM_INDEX_INFO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) Enum: 199/0xC7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) Sets the Program Index Information.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) The information is stored as follows:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) .. code-block:: c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) struct info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) u32 length; // Length of this frame
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) u32 offset_low; // Offset in the file of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) u32 offset_high; // start of this frame
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) u32 mask1; // Bits 0-2 are the type mask:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) // 1=I, 2=P, 4=B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) // 0=End of Program Index, other fields
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) // are invalid.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) u32 pts; // The PTS of the frame
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) u32 mask2; // Bit 0 is bit 32 of the pts.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) u32 table_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) struct info index[400];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657) The table_ptr is the encoder memory address in the table were
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) *new* entries will be written.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) .. note:: This is a ringbuffer, so the table_ptr will wraparound.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665) Picture Mask:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) - 0=No index capture
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667) - 1=I frames
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) - 3=I,P frames
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669) - 7=I,P,B frames
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) (Seems to be ignored, it always indexes I, P and B frames)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673) Param[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) Elements requested (up to 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) Result[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) Offset in the encoder memory of the start of the table.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683) Result[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) Number of allocated elements up to a maximum of Param[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) CX2341X_ENC_SET_VBI_CONFIG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691) ~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693) Enum: 200/0xC8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) Configure VBI settings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) Bitmap:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) .. code-block:: none
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) 0 Mode '0' Sliced, '1' Raw
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708) 1:3 Insertion:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709) '000' insert in extension & user data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) '001' insert in private packets
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711) '010' separate stream and user data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712) '111' separate stream and private data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713) 8:15 Stream ID (normally 0xBD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) Param[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718) Frames per interrupt (max 8). Only valid in raw mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720) Param[2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723) Total raw VBI frames. Only valid in raw mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725) Param[3]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728) Start codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730) Param[4]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733) Stop codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735) Param[5]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738) Lines per frame
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740) Param[6]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743) Byte per line
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745) Result[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1748) Observed frames per interrupt in raw mode only. Rage 1 to Param[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1749)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1750) Result[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1751) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1752)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1753) Observed number of frames in raw mode. Range 1 to Param[2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1755) Result[2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1756) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1757)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1758) Memory offset to start or raw VBI data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1759)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1760)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1761)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1762) CX2341X_ENC_SET_DMA_BLOCK_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1763) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1765) Enum: 201/0xC9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1766)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1767) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1768) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1769)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1770) Set DMA transfer block size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1771)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1772) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1773) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1774)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1775) DMA transfer block size in bytes or frames. When unit is bytes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1776) supported block sizes are 2^7, 2^8 and 2^9 bytes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1778) Param[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1779) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1780)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1781) Unit: 0=bytes, 1=frames
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1783)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1784)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1785) CX2341X_ENC_GET_PREV_DMA_INFO_MB_10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1786) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1787)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1788) Enum: 202/0xCA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1789)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1790) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1791) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1792)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1793) Returns information on the previous DMA transfer in conjunction with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1794) bit 27 of the interrupt mask. Uses mailbox 10.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1795)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1796) Result[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1797) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1798)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1799) Type of stream
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1801) Result[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1802) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1803)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1804) Address Offset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1806) Result[2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1807) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1808)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1809) Maximum size of transfer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1810)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1811)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1812)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1813) CX2341X_ENC_GET_PREV_DMA_INFO_MB_9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1814) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1816) Enum: 203/0xCB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1817)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1818) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1819) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1820)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1821) Returns information on the previous DMA transfer in conjunction with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1822) bit 27 or 18 of the interrupt mask. Uses mailbox 9.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1824) Result[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1825) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1826)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1827) Status bits:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1828) - 0 read completed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1829) - 1 write completed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1830) - 2 DMA read error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1831) - 3 DMA write error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1832) - 4 Scatter-Gather array error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1833)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1834) Result[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1835) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1836)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1837) DMA type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1838)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1839) Result[2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1840) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1841)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1842) Presentation Time Stamp bits 0..31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1843)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1844) Result[3]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1845) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1846)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1847) Presentation Time Stamp bit 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1848)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1849)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1850)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1851) CX2341X_ENC_SCHED_DMA_TO_HOST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1852) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1853)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1854) Enum: 204/0xCC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1855)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1856) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1857) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1858)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1859) Setup DMA to host operation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1860)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1861) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1862) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1863)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1864) Memory address of link list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1865)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1866) Param[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1867) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1868)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1869) Length of link list (wtf: what units ???)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1871) Param[2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1872) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1874) DMA type (0=MPEG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1875)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1876)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1877)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1878) CX2341X_ENC_INITIALIZE_INPUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1879) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1880)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1881) Enum: 205/0xCD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1882)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1883) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1884) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1885)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1886) Initializes the video input
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1887)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1888)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1889)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1890) CX2341X_ENC_SET_FRAME_DROP_RATE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1891) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1892)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1893) Enum: 208/0xD0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1894)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1895) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1896) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1897)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1898) For each frame captured, skip specified number of frames.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1899)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1900) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1901) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1902)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1903) Number of frames to skip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1904)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1905)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1906)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1907) CX2341X_ENC_PAUSE_ENCODER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1908) ~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1909)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1910) Enum: 210/0xD2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1911)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1912) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1913) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1914)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1915) During a pause condition, all frames are dropped instead of being encoded.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1916)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1917) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1918) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1919)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1920) - 0=Pause encoding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1921) - 1=Continue encoding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1922)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1923)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1924)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1925) CX2341X_ENC_REFRESH_INPUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1926) ~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1927)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1928) Enum: 211/0xD3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1929)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1930) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1931) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1932)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1933) Refreshes the video input
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1934)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1935)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1936)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1937) CX2341X_ENC_SET_COPYRIGHT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1938) ~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1939)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1940) Enum: 212/0xD4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1941)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1942) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1943) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1944)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1945) Sets stream copyright property
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1946)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1947) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1948) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1949)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1950)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1951) - 0=Stream is not copyrighted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1952) - 1=Stream is copyrighted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1953)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1954)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1955)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1956) CX2341X_ENC_SET_EVENT_NOTIFICATION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1957) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1958)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1959) Enum: 213/0xD5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1960)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1961) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1962) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1963)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1964) Setup firmware to notify the host about a particular event. Host must
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1965) unmask the interrupt bit.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1966)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1967) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1968) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1969)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1970) Event (0=refresh encoder input)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1971)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1972) Param[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1973) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1974)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1975) Notification 0=disabled 1=enabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1976)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1977) Param[2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1978) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1979)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1980) Interrupt bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1981)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1982) Param[3]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1983) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1984)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1985) Mailbox slot, -1 if no mailbox required.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1986)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1987)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1988)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1989) CX2341X_ENC_SET_NUM_VSYNC_LINES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1990) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1991)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1992) Enum: 214/0xD6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1993)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1994) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1995) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1996)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1997) Depending on the analog video decoder used, this assigns the number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1998) of lines for field 1 and 2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1999)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2000) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2001) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2002)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2003) Field 1 number of lines:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2004) - 0x00EF for SAA7114
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2005) - 0x00F0 for SAA7115
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2006) - 0x0105 for Micronas
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2007)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2008) Param[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2009) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2010)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2011) Field 2 number of lines:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2012) - 0x00EF for SAA7114
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2013) - 0x00F0 for SAA7115
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2014) - 0x0106 for Micronas
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2015)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2016)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2017)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2018) CX2341X_ENC_SET_PLACEHOLDER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2019) ~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2020)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2021) Enum: 215/0xD7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2022)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2023) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2024) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2025)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2026) Provides a mechanism of inserting custom user data in the MPEG stream.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2027)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2028) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2029) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2030)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2031) - 0=extension & user data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2032) - 1=private packet with stream ID 0xBD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2033)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2034) Param[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2035) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2036)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2037) Rate at which to insert data, in units of frames (for private packet)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2038) or GOPs (for ext. & user data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2039)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2040) Param[2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2041) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2042)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2043) Number of data DWORDs (below) to insert
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2044)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2045) Param[3]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2046) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2047)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2048) Custom data 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2049)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2050) Param[4]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2051) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2052)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2053) Custom data 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2054)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2055) Param[5]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2056) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2057)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2058) Custom data 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2059)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2060) Param[6]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2061) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2062)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2063) Custom data 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2064)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2065) Param[7]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2066) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2067)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2068) Custom data 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2069)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2070) Param[8]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2071) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2072)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2073) Custom data 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2074)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2075) Param[9]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2076) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2077)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2078) Custom data 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2079)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2080) Param[10]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2081) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2082)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2083) Custom data 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2084)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2085) Param[11]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2086) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2087)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2088) Custom data 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2089)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2090)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2091)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2092) CX2341X_ENC_MUTE_VIDEO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2093) ~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2094)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2095) Enum: 217/0xD9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2096)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2097) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2098) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2099)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2100) Video muting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2102) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2103) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2105) Bit usage:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2107) .. code-block:: none
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2109) 0 '0'=video not muted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2110) '1'=video muted, creates frames with the YUV color defined below
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2111) 1:7 Unused
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2112) 8:15 V chrominance information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2113) 16:23 U chrominance information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2114) 24:31 Y luminance information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2118) CX2341X_ENC_MUTE_AUDIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2119) ~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2121) Enum: 218/0xDA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2123) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2124) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2126) Audio muting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2128) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2129) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2131) - 0=audio not muted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2132) - 1=audio muted (produces silent mpeg audio stream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2136) CX2341X_ENC_SET_VERT_CROP_LINE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2137) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2139) Enum: 219/0xDB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2141) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2142) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2144) Something to do with 'Vertical Crop Line'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2146) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2147) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2149) If saa7114 and raw VBI capture and 60 Hz, then set to 10001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2150) Else 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2154) CX2341X_ENC_MISC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2155) ~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2157) Enum: 220/0xDC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2159) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2160) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2162) Miscellaneous actions. Not known for 100% what it does. It's really a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2163) sort of ioctl call. The first parameter is a command number, the second
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2164) the value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2166) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2167) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2169) Command number:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2171) .. code-block:: none
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2173) 1=set initial SCR value when starting encoding (works).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2174) 2=set quality mode (apparently some test setting).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2175) 3=setup advanced VIM protection handling.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2176) Always 1 for the cx23416 and 0 for cx23415.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2177) 4=generate DVD compatible PTS timestamps
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2178) 5=USB flush mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2179) 6=something to do with the quantization matrix
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2180) 7=set navigation pack insertion for DVD: adds 0xbf (private stream 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2181) packets to the MPEG. The size of these packets is 2048 bytes (including
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2182) the header of 6 bytes: 0x000001bf + length). The payload is zeroed and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2183) it is up to the application to fill them in. These packets are apparently
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2184) inserted every four frames.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2185) 8=enable scene change detection (seems to be a failure)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2186) 9=set history parameters of the video input module
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2187) 10=set input field order of VIM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2188) 11=set quantization matrix
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2189) 12=reset audio interface after channel change or input switch (has no argument).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2190) Needed for the cx2584x, not needed for the mspx4xx, but it doesn't seem to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2191) do any harm calling it regardless.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2192) 13=set audio volume delay
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2193) 14=set audio delay
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2196) Param[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2197) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2199) Command value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2201) Decoder firmware API description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2202) --------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2204) .. note:: this API is part of the decoder firmware, so it's cx23415 only.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2208) CX2341X_DEC_PING_FW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2209) ~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2211) Enum: 0/0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2213) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2214) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2216) This API call does nothing. It may be used to check if the firmware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2217) is responding.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2221) CX2341X_DEC_START_PLAYBACK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2222) ~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2224) Enum: 1/0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2226) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2227) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2229) Begin or resume playback.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2231) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2232) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2234) 0 based frame number in GOP to begin playback from.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2236) Param[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2237) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2239) Specifies the number of muted audio frames to play before normal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2240) audio resumes. (This is not implemented in the firmware, leave at 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2244) CX2341X_DEC_STOP_PLAYBACK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2245) ~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2247) Enum: 2/0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2249) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2250) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2252) Ends playback and clears all decoder buffers. If PTS is not zero,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2253) playback stops at specified PTS.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2255) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2256) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2258) Display 0=last frame, 1=black
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2260) .. note::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2262) this takes effect immediately, so if you want to wait for a PTS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2263) then use '0', otherwise the screen goes to black at once.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2264) You can call this later (even if there is no playback) with a 1 value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2265) to set the screen to black.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2267) Param[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2268) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2270) PTS low
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2272) Param[2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2273) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2275) PTS high
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2279) CX2341X_DEC_SET_PLAYBACK_SPEED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2280) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2282) Enum: 3/0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2284) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2285) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2287) Playback stream at speed other than normal. There are two modes of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2288) operation:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2290) - Smooth: host transfers entire stream and firmware drops unused
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2291) frames.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2292) - Coarse: host drops frames based on indexing as required to achieve
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2293) desired speed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2295) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2296) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2298) .. code-block:: none
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2300) Bitmap:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2301) 0:7 0 normal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2302) 1 fast only "1.5 times"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2303) n nX fast, 1/nX slow
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2304) 30 Framedrop:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2305) '0' during 1.5 times play, every other B frame is dropped
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2306) '1' during 1.5 times play, stream is unchanged (bitrate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2307) must not exceed 8mbps)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2308) 31 Speed:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2309) '0' slow
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2310) '1' fast
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2312) .. note::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2314) n is limited to 2. Anything higher does not result in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2315) faster playback. Instead the host should start dropping frames.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2317) Param[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2318) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2320) Direction: 0=forward, 1=reverse
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2322) .. note::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2324) to make reverse playback work you have to write full GOPs in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2325) reverse order.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2327) Param[2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2328) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2330) .. code-block:: none
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2332) Picture mask:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2333) 1=I frames
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2334) 3=I, P frames
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2335) 7=I, P, B frames
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2337) Param[3]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2338) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2340) B frames per GOP (for reverse play only)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2342) .. note::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2344) for reverse playback the Picture Mask should be set to I or I, P.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2345) Adding B frames to the mask will result in corrupt video. This field
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2346) has to be set to the correct value in order to keep the timing correct.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2348) Param[4]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2349) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2351) Mute audio: 0=disable, 1=enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2353) Param[5]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2354) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2356) Display 0=frame, 1=field
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2358) Param[6]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2359) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2361) Specifies the number of muted audio frames to play before normal audio
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2362) resumes. (Not implemented in the firmware, leave at 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2366) CX2341X_DEC_STEP_VIDEO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2367) ~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2369) Enum: 5/0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2371) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2372) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2374) Each call to this API steps the playback to the next unit defined below
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2375) in the current playback direction.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2377) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2378) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2380) 0=frame, 1=top field, 2=bottom field
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2384) CX2341X_DEC_SET_DMA_BLOCK_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2385) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2387) Enum: 8/0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2389) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2390) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2392) Set DMA transfer block size. Counterpart to API 0xC9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2394) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2395) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2397) DMA transfer block size in bytes. A different size may be specified
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2398) when issuing the DMA transfer command.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2402) CX2341X_DEC_GET_XFER_INFO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2403) ~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2405) Enum: 9/0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2407) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2408) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2410) This API call may be used to detect an end of stream condition.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2412) Result[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2413) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2415) Stream type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2417) Result[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2418) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2420) Address offset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2422) Result[2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2423) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2425) Maximum bytes to transfer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2427) Result[3]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2428) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2430) Buffer fullness
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2434) CX2341X_DEC_GET_DMA_STATUS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2435) ~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2437) Enum: 10/0x0A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2439) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2440) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2442) Status of the last DMA transfer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2444) Result[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2445) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2447) Bit 1 set means transfer complete
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2448) Bit 2 set means DMA error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2449) Bit 3 set means linked list error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2451) Result[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2452) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2454) DMA type: 0=MPEG, 1=OSD, 2=YUV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2458) CX2341X_DEC_SCHED_DMA_FROM_HOST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2459) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2461) Enum: 11/0x0B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2463) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2464) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2466) Setup DMA from host operation. Counterpart to API 0xCC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2468) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2469) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2471) Memory address of link list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2473) Param[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2474) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2476) Total # of bytes to transfer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2478) Param[2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2479) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2481) DMA type (0=MPEG, 1=OSD, 2=YUV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2485) CX2341X_DEC_PAUSE_PLAYBACK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2486) ~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2488) Enum: 13/0x0D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2490) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2491) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2493) Freeze playback immediately. In this mode, when internal buffers are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2494) full, no more data will be accepted and data request IRQs will be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2495) masked.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2497) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2498) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2500) Display: 0=last frame, 1=black
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2504) CX2341X_DEC_HALT_FW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2505) ~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2507) Enum: 14/0x0E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2509) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2510) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2512) The firmware is halted and no further API calls are serviced until
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2513) the firmware is uploaded again.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2517) CX2341X_DEC_SET_STANDARD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2518) ~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2520) Enum: 16/0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2522) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2523) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2525) Selects display standard
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2527) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2528) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2530) 0=NTSC, 1=PAL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2534) CX2341X_DEC_GET_VERSION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2535) ~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2537) Enum: 17/0x11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2539) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2540) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2542) Returns decoder firmware version information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2544) Result[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2545) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2547) Version bitmask:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2548) - Bits 0:15 build
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2549) - Bits 16:23 minor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2550) - Bits 24:31 major
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2554) CX2341X_DEC_SET_STREAM_INPUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2555) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2557) Enum: 20/0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2559) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2560) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2562) Select decoder stream input port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2564) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2565) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2567) 0=memory (default), 1=streaming
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2571) CX2341X_DEC_GET_TIMING_INFO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2572) ~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2574) Enum: 21/0x15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2576) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2577) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2579) Returns timing information from start of playback
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2581) Result[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2582) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2583)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2584) Frame count by decode order
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2586) Result[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2587) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2589) Video PTS bits 0:31 by display order
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2591) Result[2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2592) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2594) Video PTS bit 32 by display order
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2596) Result[3]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2597) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2599) SCR bits 0:31 by display order
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2601) Result[4]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2602) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2604) SCR bit 32 by display order
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2607)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2608) CX2341X_DEC_SET_AUDIO_MODE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2609) ~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2611) Enum: 22/0x16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2613) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2614) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2615)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2616) Select audio mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2618) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2619) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2621) Dual mono mode action
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2622) 0=Stereo, 1=Left, 2=Right, 3=Mono, 4=Swap, -1=Unchanged
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2624) Param[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2625) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2627) Stereo mode action:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2628) 0=Stereo, 1=Left, 2=Right, 3=Mono, 4=Swap, -1=Unchanged
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2631)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2632) CX2341X_DEC_SET_EVENT_NOTIFICATION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2633) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2635) Enum: 23/0x17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2637) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2638) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2640) Setup firmware to notify the host about a particular event.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2641) Counterpart to API 0xD5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2643) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2644) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2646) Event:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2647) - 0=Audio mode change between mono, (joint) stereo and dual channel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2648) - 3=Decoder started
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2649) - 4=Unknown: goes off 10-15 times per second while decoding.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2650) - 5=Some sync event: goes off once per frame.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2651)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2652) Param[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2653) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2654)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2655) Notification 0=disabled, 1=enabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2657) Param[2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2658) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2659)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2660) Interrupt bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2661)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2662) Param[3]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2663) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2665) Mailbox slot, -1 if no mailbox required.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2666)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2668)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2669) CX2341X_DEC_SET_DISPLAY_BUFFERS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2670) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2671)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2672) Enum: 24/0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2673)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2674) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2675) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2676)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2677) Number of display buffers. To decode all frames in reverse playback you
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2678) must use nine buffers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2680) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2681) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2683) 0=six buffers, 1=nine buffers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2684)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2685)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2686)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2687) CX2341X_DEC_EXTRACT_VBI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2688) ~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2689)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2690) Enum: 25/0x19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2691)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2692) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2693) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2694)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2695) Extracts VBI data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2697) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2698) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2700) 0=extract from extension & user data, 1=extract from private packets
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2701)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2702) Result[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2703) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2705) VBI table location
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2706)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2707) Result[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2708) ^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2709)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2710) VBI table size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2712)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2713)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2714) CX2341X_DEC_SET_DECODER_SOURCE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2715) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2716)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2717) Enum: 26/0x1A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2719) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2720) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2721)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2722) Selects decoder source. Ensure that the parameters passed to this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2723) API match the encoder settings.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2724)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2725) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2726) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2727)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2728) Mode: 0=MPEG from host, 1=YUV from encoder, 2=YUV from host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2729)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2730) Param[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2731) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2732)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2733) YUV picture width
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2735) Param[2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2736) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2737)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2738) YUV picture height
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2739)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2740) Param[3]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2741) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2742)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2743) Bitmap: see Param[0] of API 0xBD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2744)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2745)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2746)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2747) CX2341X_DEC_SET_PREBUFFERING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2748) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2749)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2750) Enum: 30/0x1E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2751)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2752) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2753) ^^^^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2755) Decoder prebuffering, when enabled up to 128KB are buffered for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2756) streams <8mpbs or 640KB for streams >8mbps
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2757)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2758) Param[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2759) ^^^^^^^^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2760)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2761) 0=off, 1=on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2762)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2763) PVR350 Video decoder registers 0x02002800 -> 0x02002B00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2764) -------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2765)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2766) Author: Ian Armstrong <ian@iarmst.demon.co.uk>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2767)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2768) Version: v0.4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2769)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2770) Date: 12 March 2007
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2771)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2772)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2773) This list has been worked out through trial and error. There will be mistakes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2774) and omissions. Some registers have no obvious effect so it's hard to say what
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2775) they do, while others interact with each other, or require a certain load
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2776) sequence. Horizontal filter setup is one example, with six registers working
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2777) in unison and requiring a certain load sequence to correctly configure. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2778) indexed colour palette is much easier to set at just two registers, but again
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2779) it requires a certain load sequence.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2780)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2781) Some registers are fussy about what they are set to. Load in a bad value & the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2782) decoder will fail. A firmware reload will often recover, but sometimes a reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2783) is required. For registers containing size information, setting them to 0 is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2784) generally a bad idea. For other control registers i.e. 2878, you'll only find
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2785) out what values are bad when it hangs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2787) .. code-block:: none
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2789) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2790) 2800
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2791) bit 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2792) Decoder enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2793) 0 = disable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2794) 1 = enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2795) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2796) 2804
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2797) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2798) Decoder horizontal Y alias register 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2799) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2800) 2808
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2801) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2802) Decoder horizontal Y alias register 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2803) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2804) 280C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2805) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2806) Decoder horizontal Y alias register 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2807) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2808) 2810
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2809) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2810) Decoder horizontal Y alias register 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2811) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2812) 2814
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2813) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2814) Decoder horizontal Y alias register 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2815) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2816) 2818
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2817) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2818) Decoder horizontal Y alias trigger
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2819)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2820) These six registers control the horizontal aliasing filter for the Y plane.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2821) The first five registers must all be loaded before accessing the trigger
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2822) (2818), as this register actually clocks the data through for the first
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2823) five.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2824)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2825) To correctly program set the filter, this whole procedure must be done 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2826) times. The actual register contents are copied from a lookup-table in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2827) firmware which contains 4 different filter settings.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2828)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2829) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2830) 281C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2831) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2832) Decoder horizontal UV alias register 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2833) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2834) 2820
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2835) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2836) Decoder horizontal UV alias register 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2837) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2838) 2824
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2839) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2840) Decoder horizontal UV alias register 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2841) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2842) 2828
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2843) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2844) Decoder horizontal UV alias register 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2845) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2846) 282C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2847) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2848) Decoder horizontal UV alias register 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2849) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2850) 2830
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2851) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2852) Decoder horizontal UV alias trigger
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2853)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2854) These six registers control the horizontal aliasing for the UV plane.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2855) Operation is the same as the Y filter, with 2830 being the trigger
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2856) register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2857)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2858) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2859) 2834
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2860) bits 0:15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2861) Decoder Y source width in pixels
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2862)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2863) bits 16:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2864) Decoder Y destination width in pixels
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2865) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2866) 2838
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2867) bits 0:15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2868) Decoder UV source width in pixels
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2869)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2870) bits 16:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2871) Decoder UV destination width in pixels
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2872)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2873) NOTE: For both registers, the resulting image must be fully visible on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2874) screen. If the image exceeds the right edge both the source and destination
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2875) size must be adjusted to reflect the visible portion. For the source width,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2876) you must take into account the scaling when calculating the new value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2877) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2878)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2879) 283C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2880) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2881) Decoder Y horizontal scaling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2882) Normally = Reg 2854 >> 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2883) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2884) 2840
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2885) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2886) Decoder ?? unknown - horizontal scaling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2887) Usually 0x00080514
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2888) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2889) 2844
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2890) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2891) Decoder UV horizontal scaling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2892) Normally = Reg 2854 >> 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2893) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2894) 2848
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2895) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2896) Decoder ?? unknown - horizontal scaling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2897) Usually 0x00100514
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2898) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2899) 284C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2900) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2901) Decoder ?? unknown - Y plane
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2902) Usually 0x00200020
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2903) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2904) 2850
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2905) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2906) Decoder ?? unknown - UV plane
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2907) Usually 0x00200020
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2908) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2909) 2854
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2910) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2911) Decoder 'master' value for horizontal scaling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2912) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2913) 2858
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2914) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2915) Decoder ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2916) Usually 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2917) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2918) 285C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2919) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2920) Decoder ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2921) Normally = Reg 2854 >> 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2922) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2923) 2860
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2924) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2925) Decoder ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2926) Usually 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2927) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2928) 2864
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2929) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2930) Decoder ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2931) Normally = Reg 2854 >> 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2932) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2933) 2868
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2934) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2935) Decoder ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2936) Usually 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2937)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2938) Most of these registers either control horizontal scaling, or appear linked
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2939) to it in some way. Register 2854 contains the 'master' value & the other
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2940) registers can be calculated from that one. You must also remember to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2941) correctly set the divider in Reg 2874.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2942)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2943) To enlarge:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2944) Reg 2854 = (source_width * 0x00200000) / destination_width
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2945) Reg 2874 = No divide
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2946)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2947) To reduce from full size down to half size:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2948) Reg 2854 = (source_width/2 * 0x00200000) / destination width
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2949) Reg 2874 = Divide by 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2950)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2951) To reduce from half size down to quarter size:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2952) Reg 2854 = (source_width/4 * 0x00200000) / destination width
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2953) Reg 2874 = Divide by 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2954)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2955) The result is always rounded up.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2956)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2957) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2958) 286C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2959) bits 0:15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2960) Decoder horizontal Y buffer offset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2961)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2962) bits 15:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2963) Decoder horizontal UV buffer offset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2964)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2965) Offset into the video image buffer. If the offset is gradually incremented,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2966) the on screen image will move left & wrap around higher up on the right.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2967)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2968) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2969) 2870
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2970) bits 0:15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2971) Decoder horizontal Y output offset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2972)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2973) bits 16:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2974) Decoder horizontal UV output offset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2975)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2976) Offsets the actual video output. Controls output alignment of the Y & UV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2977) planes. The higher the value, the greater the shift to the left. Use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2978) reg 2890 to move the image right.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2979)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2980) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2981) 2874
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2982) bits 0:1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2983) Decoder horizontal Y output size divider
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2984) 00 = No divide
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2985) 01 = Divide by 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2986) 10 = Divide by 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2987)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2988) bits 4:5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2989) Decoder horizontal UV output size divider
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2990) 00 = No divide
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2991) 01 = Divide by 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2992) 10 = Divide by 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2993)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2994) bit 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2995) Decoder ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2996) 0 = Normal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2997) 1 = Affects video output levels
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2998)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2999) bit 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3000) Decoder ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3001) 0 = Normal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3002) 1 = Disable horizontal filter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3003)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3004) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3005) 2878
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3006) bit 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3007) ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3008)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3009) bit 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3010) osd on/off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3011) 0 = osd off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3012) 1 = osd on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3013)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3014) bit 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3015) Decoder + osd video timing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3016) 0 = NTSC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3017) 1 = PAL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3018)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3019) bits 3:4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3020) ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3021)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3022) bit 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3023) Decoder + osd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3024) Swaps upper & lower fields
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3025)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3026) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3027) 287C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3028) bits 0:10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3029) Decoder & osd ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3030) Moves entire screen horizontally. Starts at 0x005 with the screen
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3031) shifted heavily to the right. Incrementing in steps of 0x004 will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3032) gradually shift the screen to the left.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3033)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3034) bits 11:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3035) ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3036)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3037) Normally contents are 0x00101111 (NTSC) or 0x1010111d (PAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3038)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3039) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3040) 2880 -------- ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3041) 2884 -------- ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3042) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3043) 2888
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3044) bit 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3045) Decoder + osd ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3046) 0 = Normal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3047) 1 = Misaligned fields (Correctable through 289C & 28A4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3048)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3049) bit 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3050) ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3051)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3052) bit 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3053) ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3054)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3055) Warning: Bad values will require a firmware reload to recover.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3056) Known to be bad are 0x000,0x011,0x100,0x111
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3057) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3058) 288C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3059) bits 0:15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3060) osd ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3061) Appears to affect the osd position stability. The higher the value the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3062) more unstable it becomes. Decoder output remains stable.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3063)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3064) bits 16:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3065) osd ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3066) Same as bits 0:15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3067)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3068) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3069) 2890
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3070) bits 0:11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3071) Decoder output horizontal offset.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3072)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3073) Horizontal offset moves the video image right. A small left shift is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3074) possible, but it's better to use reg 2870 for that due to its greater
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3075) range.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3076)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3077) NOTE: Video corruption will occur if video window is shifted off the right
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3078) edge. To avoid this read the notes for 2834 & 2838.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3079) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3080) 2894
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3081) bits 0:23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3082) Decoder output video surround colour.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3083)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3084) Contains the colour (in yuv) used to fill the screen when the video is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3085) running in a window.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3086) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3087) 2898
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3088) bits 0:23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3089) Decoder video window colour
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3090) Contains the colour (in yuv) used to fill the video window when the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3091) video is turned off.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3092)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3093) bit 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3094) Decoder video output
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3095) 0 = Video on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3096) 1 = Video off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3097)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3098) bit 28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3099) Decoder plane order
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3100) 0 = Y,UV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3101) 1 = UV,Y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3103) bit 29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3104) Decoder second plane byte order
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3105) 0 = Normal (UV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3106) 1 = Swapped (VU)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3108) In normal usage, the first plane is Y & the second plane is UV. Though the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3109) order of the planes can be swapped, only the byte order of the second plane
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3110) can be swapped. This isn't much use for the Y plane, but can be useful for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3111) the UV plane.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3113) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3114) 289C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3115) bits 0:15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3116) Decoder vertical field offset 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3118) bits 16:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3119) Decoder vertical field offset 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3121) Controls field output vertical alignment. The higher the number, the lower
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3122) the image on screen. Known starting values are 0x011E0017 (NTSC) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3123) 0x01500017 (PAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3124) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3125) 28A0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3126) bits 0:15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3127) Decoder & osd width in pixels
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3129) bits 16:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3130) Decoder & osd height in pixels
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3132) All output from the decoder & osd are disabled beyond this area. Decoder
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3133) output will simply go black outside of this region. If the osd tries to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3134) exceed this area it will become corrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3135) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3136) 28A4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3137) bits 0:11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3138) osd left shift.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3140) Has a range of 0x770->0x7FF. With the exception of 0, any value outside of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3141) this range corrupts the osd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3142) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3143) 28A8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3144) bits 0:15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3145) osd vertical field offset 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3147) bits 16:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3148) osd vertical field offset 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3150) Controls field output vertical alignment. The higher the number, the lower
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3151) the image on screen. Known starting values are 0x011E0017 (NTSC) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3152) 0x01500017 (PAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3153) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3154) 28AC -------- ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3155) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3156) V
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3157) 28BC -------- ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3158) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3159) 28C0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3160) bit 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3161) Current output field
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3162) 0 = first field
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3163) 1 = second field
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3165) bits 16:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3166) Current scanline
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3167) The scanline counts from the top line of the first field
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3168) through to the last line of the second field.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3169) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3170) 28C4 -------- ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3171) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3172) V
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3173) 28F8 -------- ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3174) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3175) 28FC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3176) bit 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3177) ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3178) 0 = Normal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3179) 1 = Breaks decoder & osd output
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3180) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3181) 2900
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3182) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3183) Decoder vertical Y alias register 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3184) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3185) 2904
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3186) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3187) Decoder vertical Y alias register 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3188) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3189) 2908
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3190) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3191) Decoder vertical Y alias trigger
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3193) These three registers control the vertical aliasing filter for the Y plane.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3194) Operation is similar to the horizontal Y filter (2804). The only real
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3195) difference is that there are only two registers to set before accessing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3196) the trigger register (2908). As for the horizontal filter, the values are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3197) taken from a lookup table in the firmware, and the procedure must be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3198) repeated 16 times to fully program the filter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3199) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3200) 290C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3201) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3202) Decoder vertical UV alias register 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3203) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3204) 2910
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3205) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3206) Decoder vertical UV alias register 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3207) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3208) 2914
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3209) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3210) Decoder vertical UV alias trigger
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3212) These three registers control the vertical aliasing filter for the UV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3213) plane. Operation is the same as the Y filter, with 2914 being the trigger.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3214) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3215) 2918
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3216) bits 0:15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3217) Decoder Y source height in pixels
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3219) bits 16:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3220) Decoder Y destination height in pixels
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3221) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3222) 291C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3223) bits 0:15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3224) Decoder UV source height in pixels divided by 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3226) bits 16:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3227) Decoder UV destination height in pixels
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3229) NOTE: For both registers, the resulting image must be fully visible on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3230) screen. If the image exceeds the bottom edge both the source and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3231) destination size must be adjusted to reflect the visible portion. For the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3232) source height, you must take into account the scaling when calculating the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3233) new value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3234) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3235) 2920
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3236) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3237) Decoder Y vertical scaling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3238) Normally = Reg 2930 >> 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3239) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3240) 2924
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3241) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3242) Decoder Y vertical scaling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3243) Normally = Reg 2920 + 0x514
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3244) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3245) 2928
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3246) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3247) Decoder UV vertical scaling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3248) When enlarging = Reg 2930 >> 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3249) When reducing = Reg 2930 >> 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3250) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3251) 292C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3252) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3253) Decoder UV vertical scaling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3254) Normally = Reg 2928 + 0x514
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3255) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3256) 2930
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3257) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3258) Decoder 'master' value for vertical scaling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3259) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3260) 2934
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3261) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3262) Decoder ?? unknown - Y vertical scaling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3263) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3264) 2938
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3265) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3266) Decoder Y vertical scaling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3267) Normally = Reg 2930
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3268) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3269) 293C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3270) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3271) Decoder ?? unknown - Y vertical scaling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3272) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3273) 2940
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3274) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3275) Decoder UV vertical scaling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3276) When enlarging = Reg 2930 >> 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3277) When reducing = Reg 2930
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3278) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3279) 2944
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3280) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3281) Decoder ?? unknown - UV vertical scaling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3282) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3283) 2948
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3284) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3285) Decoder UV vertical scaling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3286) Normally = Reg 2940
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3287) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3288) 294C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3289) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3290) Decoder ?? unknown - UV vertical scaling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3292) Most of these registers either control vertical scaling, or appear linked
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3293) to it in some way. Register 2930 contains the 'master' value & all other
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3294) registers can be calculated from that one. You must also remember to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3295) correctly set the divider in Reg 296C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3297) To enlarge:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3298) Reg 2930 = (source_height * 0x00200000) / destination_height
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3299) Reg 296C = No divide
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3301) To reduce from full size down to half size:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3302) Reg 2930 = (source_height/2 * 0x00200000) / destination height
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3303) Reg 296C = Divide by 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3305) To reduce from half down to quarter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3306) Reg 2930 = (source_height/4 * 0x00200000) / destination height
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3307) Reg 296C = Divide by 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3309) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3310) 2950
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3311) bits 0:15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3312) Decoder Y line index into display buffer, first field
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3314) bits 16:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3315) Decoder Y vertical line skip, first field
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3316) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3317) 2954
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3318) bits 0:15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3319) Decoder Y line index into display buffer, second field
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3321) bits 16:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3322) Decoder Y vertical line skip, second field
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3323) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3324) 2958
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3325) bits 0:15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3326) Decoder UV line index into display buffer, first field
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3328) bits 16:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3329) Decoder UV vertical line skip, first field
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3330) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3331) 295C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3332) bits 0:15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3333) Decoder UV line index into display buffer, second field
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3335) bits 16:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3336) Decoder UV vertical line skip, second field
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3337) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3338) 2960
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3339) bits 0:15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3340) Decoder destination height minus 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3342) bits 16:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3343) Decoder destination height divided by 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3344) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3345) 2964
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3346) bits 0:15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3347) Decoder Y vertical offset, second field
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3349) bits 16:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3350) Decoder Y vertical offset, first field
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3352) These two registers shift the Y plane up. The higher the number, the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3353) greater the shift.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3354) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3355) 2968
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3356) bits 0:15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3357) Decoder UV vertical offset, second field
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3359) bits 16:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3360) Decoder UV vertical offset, first field
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3362) These two registers shift the UV plane up. The higher the number, the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3363) greater the shift.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3364) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3365) 296C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3366) bits 0:1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3367) Decoder vertical Y output size divider
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3368) 00 = No divide
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3369) 01 = Divide by 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3370) 10 = Divide by 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3372) bits 8:9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3373) Decoder vertical UV output size divider
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3374) 00 = No divide
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3375) 01 = Divide by 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3376) 10 = Divide by 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3377) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3378) 2970
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3379) bit 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3380) Decoder ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3381) 0 = Normal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3382) 1 = Affect video output levels
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3384) bit 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3385) Decoder ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3386) 0 = Normal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3387) 1 = Disable vertical filter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3389) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3390) 2974 -------- ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3391) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3392) V
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3393) 29EF -------- ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3394) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3395) 2A00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3396) bits 0:2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3397) osd colour mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3398) 000 = 8 bit indexed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3399) 001 = 16 bit (565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3400) 010 = 15 bit (555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3401) 011 = 12 bit (444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3402) 100 = 32 bit (8888)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3404) bits 4:5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3405) osd display bpp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3406) 01 = 8 bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3407) 10 = 16 bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3408) 11 = 32 bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3410) bit 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3411) osd global alpha
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3412) 0 = Off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3413) 1 = On
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3415) bit 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3416) osd local alpha
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3417) 0 = Off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3418) 1 = On
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3420) bit 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3421) osd colour key
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3422) 0 = Off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3423) 1 = On
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3425) bit 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3426) osd ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3427) Must be 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3429) bit 13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3430) osd colour space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3431) 0 = ARGB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3432) 1 = AYVU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3434) bits 16:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3435) osd ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3436) Must be 0x001B (some kind of buffer pointer ?)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3438) When the bits-per-pixel is set to 8, the colour mode is ignored and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3439) assumed to be 8 bit indexed. For 16 & 32 bits-per-pixel the colour depth
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3440) is honoured, and when using a colour depth that requires fewer bytes than
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3441) allocated the extra bytes are used as padding. So for a 32 bpp with 8 bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3442) index colour, there are 3 padding bytes per pixel. It's also possible to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3443) select 16bpp with a 32 bit colour mode. This results in the pixel width
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3444) being doubled, but the color key will not work as expected in this mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3446) Colour key is as it suggests. You designate a colour which will become
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3447) completely transparent. When using 565, 555 or 444 colour modes, the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3448) colour key is always 16 bits wide. The colour to key on is set in Reg 2A18.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3450) Local alpha works differently depending on the colour mode. For 32bpp & 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3451) bit indexed, local alpha is a per-pixel 256 step transparency, with 0 being
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3452) transparent and 255 being solid. For the 16bpp modes 555 & 444, the unused
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3453) bit(s) act as a simple transparency switch, with 0 being solid & 1 being
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3454) fully transparent. There is no local alpha support for 16bit 565.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3456) Global alpha is a 256 step transparency that applies to the entire osd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3457) with 0 being transparent & 255 being solid.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3459) It's possible to combine colour key, local alpha & global alpha.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3460) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3461) 2A04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3462) bits 0:15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3463) osd x coord for left edge
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3465) bits 16:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3466) osd y coord for top edge
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3467) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3468) 2A08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3469) bits 0:15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3470) osd x coord for right edge
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3472) bits 16:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3473) osd y coord for bottom edge
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3475) For both registers, (0,0) = top left corner of the display area. These
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3476) registers do not control the osd size, only where it's positioned & how
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3477) much is visible. The visible osd area cannot exceed the right edge of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3478) display, otherwise the osd will become corrupt. See reg 2A10 for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3479) setting osd width.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3480) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3481) 2A0C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3482) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3483) osd buffer index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3485) An index into the osd buffer. Slowly incrementing this moves the osd left,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3486) wrapping around onto the right edge
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3487) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3488) 2A10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3489) bits 0:11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3490) osd buffer 32 bit word width
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3492) Contains the width of the osd measured in 32 bit words. This means that all
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3493) colour modes are restricted to a byte width which is divisible by 4.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3494) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3495) 2A14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3496) bits 0:15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3497) osd height in pixels
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3499) bits 16:32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3500) osd line index into buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3501) osd will start displaying from this line.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3502) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3503) 2A18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3504) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3505) osd colour key
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3507) Contains the colour value which will be transparent.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3508) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3509) 2A1C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3510) bits 0:7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3511) osd global alpha
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3513) Contains the global alpha value (equiv ivtvfbctl --alpha XX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3514) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3515) 2A20 -------- ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3516) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3517) V
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3518) 2A2C -------- ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3519) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3520) 2A30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3521) bits 0:7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3522) osd colour to change in indexed palette
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3523) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3524) 2A34
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3525) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3526) osd colour for indexed palette
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3528) To set the new palette, first load the index of the colour to change into
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3529) 2A30, then load the new colour into 2A34. The full palette is 256 colours,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3530) so the index range is 0x00-0xFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3531) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3532) 2A38 -------- ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3533) 2A3C -------- ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3534) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3535) 2A40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3536) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3537) osd ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3539) Affects overall brightness, wrapping around to black
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3540) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3541) 2A44
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3542) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3543) osd ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3545) Green tint
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3546) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3547) 2A48
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3548) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3549) osd ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3551) Red tint
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3552) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3553) 2A4C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3554) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3555) osd ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3557) Affects overall brightness, wrapping around to black
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3558) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3559) 2A50
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3560) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3561) osd ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3563) Colour shift
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3564) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3565) 2A54
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3566) bits 0:31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3567) osd ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3569) Colour shift
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3570) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3571) 2A58 -------- ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3572) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3573) V
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3574) 2AFC -------- ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3575) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3576) 2B00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3577) bit 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3578) osd filter control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3579) 0 = filter off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3580) 1 = filter on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3582) bits 1:4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3583) osd ?? unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3585) --------------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3587) The cx231xx DMA engine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3588) ----------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3589)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3591) This page describes the structures and procedures used by the cx2341x DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3592) engine.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3594) Introduction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3595) ~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3597) The cx2341x PCI interface is busmaster capable. This means it has a DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3598) engine to efficiently transfer large volumes of data between the card and main
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3599) memory without requiring help from a CPU. Like most hardware, it must operate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3600) on contiguous physical memory. This is difficult to come by in large quantities
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3601) on virtual memory machines.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3603) Therefore, it also supports a technique called "scatter-gather". The card can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3604) transfer multiple buffers in one operation. Instead of allocating one large
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3605) contiguous buffer, the driver can allocate several smaller buffers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3607) In practice, I've seen the average transfer to be roughly 80K, but transfers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3608) above 128K were not uncommon, particularly at startup. The 128K figure is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3609) important, because that is the largest block that the kernel can normally
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3610) allocate. Even still, 128K blocks are hard to come by, so the driver writer is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3611) urged to choose a smaller block size and learn the scatter-gather technique.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3613) Mailbox #10 is reserved for DMA transfer information.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3615) Note: the hardware expects little-endian data ('intel format').
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3617) Flow
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3618) ~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3620) This section describes, in general, the order of events when handling DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3621) transfers. Detailed information follows this section.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3623) - The card raises the Encoder interrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3624) - The driver reads the transfer type, offset and size from Mailbox #10.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3625) - The driver constructs the scatter-gather array from enough free dma buffers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3626) to cover the size.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3627) - The driver schedules the DMA transfer via the ScheduleDMAtoHost API call.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3628) - The card raises the DMA Complete interrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3629) - The driver checks the DMA status register for any errors.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3630) - The driver post-processes the newly transferred buffers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3631)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3632) NOTE! It is possible that the Encoder and DMA Complete interrupts get raised
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3633) simultaneously. (End of the last, start of the next, etc.)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3635) Mailbox #10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3636) ~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3638) The Flags, Command, Return Value and Timeout fields are ignored.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3640) - Name: Mailbox #10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3641) - Results[0]: Type: 0: MPEG.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3642) - Results[1]: Offset: The position relative to the card's memory space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3643) - Results[2]: Size: The exact number of bytes to transfer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3644)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3645) My speculation is that since the StartCapture API has a capture type of "RAW"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3646) available, that the type field will have other values that correspond to YUV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3647) and PCM data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3649) Scatter-Gather Array
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3650) ~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3651)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3652) The scatter-gather array is a contiguously allocated block of memory that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3653) tells the card the source and destination of each data-block to transfer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3654) Card "addresses" are derived from the offset supplied by Mailbox #10. Host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3655) addresses are the physical memory location of the target DMA buffer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3657) Each S-G array element is a struct of three 32-bit words. The first word is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3658) the source address, the second is the destination address. Both take up the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3659) entire 32 bits. The lowest 18 bits of the third word is the transfer byte
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3660) count. The high-bit of the third word is the "last" flag. The last-flag tells
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3661) the card to raise the DMA_DONE interrupt. From hard personal experience, if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3662) you forget to set this bit, the card will still "work" but the stream will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3663) most likely get corrupted.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3665) The transfer count must be a multiple of 256. Therefore, the driver will need
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3666) to track how much data in the target buffer is valid and deal with it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3667) accordingly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3668)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3669) Array Element:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3671) - 32-bit Source Address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3672) - 32-bit Destination Address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3673) - 14-bit reserved (high bit is the last flag)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3674) - 18-bit byte count
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3675)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3676) DMA Transfer Status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3677) ~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3678)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3679) Register 0x0004 holds the DMA Transfer Status:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3681) - bit 0: read completed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3682) - bit 1: write completed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3683) - bit 2: DMA read error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3684) - bit 3: DMA write error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3685) - bit 4: Scatter-Gather array error
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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