^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) .. SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) =====================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) Generic System Interconnect Subsystem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) =====================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) Introduction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) ------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) This framework is designed to provide a standard kernel interface to control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) the settings of the interconnects on an SoC. These settings can be throughput,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) latency and priority between multiple interconnected devices or functional
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) blocks. This can be controlled dynamically in order to save power or provide
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) maximum performance.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) The interconnect bus is hardware with configurable parameters, which can be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) set on a data path according to the requests received from various drivers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) An example of interconnect buses are the interconnects between various
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) components or functional blocks in chipsets. There can be multiple interconnects
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) on an SoC that can be multi-tiered.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) Below is a simplified diagram of a real-world SoC interconnect bus topology.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) ::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) +----------------+ +----------------+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) | HW Accelerator |--->| M NoC |<---------------+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) +----------------+ +----------------+ |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) | | +------------+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) +-----+ +-------------+ V +------+ | |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) | DDR | | +--------+ | PCIe | | |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) +-----+ | | Slaves | +------+ | |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) ^ ^ | +--------+ | | C NoC |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) | | V V | |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) +------------------+ +------------------------+ | | +-----+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) | |-->| |-->| |-->| CPU |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) | |-->| |<--| | +-----+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) | Mem NoC | | S NoC | +------------+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) | |<--| |---------+ |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) | |<--| |<------+ | | +--------+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) +------------------+ +------------------------+ | | +-->| Slaves |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) ^ ^ ^ ^ ^ | | +--------+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) | | | | | | V
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) +------+ | +-----+ +-----+ +---------+ +----------------+ +--------+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) | CPUs | | | GPU | | DSP | | Masters |-->| P NoC |-->| Slaves |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) +------+ | +-----+ +-----+ +---------+ +----------------+ +--------+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) +-------+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) | Modem |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) +-------+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) Terminology
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) -----------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) Interconnect provider is the software definition of the interconnect hardware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) The interconnect providers on the above diagram are M NoC, S NoC, C NoC, P NoC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) and Mem NoC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) Interconnect node is the software definition of the interconnect hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) port. Each interconnect provider consists of multiple interconnect nodes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) which are connected to other SoC components including other interconnect
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) providers. The point on the diagram where the CPUs connect to the memory is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) called an interconnect node, which belongs to the Mem NoC interconnect provider.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) Interconnect endpoints are the first or the last element of the path. Every
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) endpoint is a node, but not every node is an endpoint.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) Interconnect path is everything between two endpoints including all the nodes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) that have to be traversed to reach from a source to destination node. It may
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) include multiple master-slave pairs across several interconnect providers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) Interconnect consumers are the entities which make use of the data paths exposed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) by the providers. The consumers send requests to providers requesting various
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) throughput, latency and priority. Usually the consumers are device drivers, that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) send request based on their needs. An example for a consumer is a video decoder
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) that supports various formats and image sizes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) Interconnect providers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) ----------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) Interconnect provider is an entity that implements methods to initialize and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) configure interconnect bus hardware. The interconnect provider drivers should
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) be registered with the interconnect provider core.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .. kernel-doc:: include/linux/interconnect-provider.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) Interconnect consumers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) ----------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) Interconnect consumers are the clients which use the interconnect APIs to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) get paths between endpoints and set their bandwidth/latency/QoS requirements
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) for these interconnect paths. These interfaces are not currently
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) documented.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) Interconnect debugfs interfaces
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) -------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) Like several other subsystems interconnect will create some files for debugging
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) and introspection. Files in debugfs are not considered ABI so application
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) software shouldn't rely on format details change between kernel versions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) ``/sys/kernel/debug/interconnect/interconnect_summary``:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) Show all interconnect nodes in the system with their aggregated bandwidth
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) request. Indented under each node show bandwidth requests from each device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) ``/sys/kernel/debug/interconnect/interconnect_graph``:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) Show the interconnect graph in the graphviz dot format. It shows all
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) interconnect nodes and links in the system and groups together nodes from the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) same provider as subgraphs. The format is human-readable and can also be piped
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) through dot to generate diagrams in many graphical formats::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) $ cat /sys/kernel/debug/interconnect/interconnect_graph | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) dot -Tsvg > interconnect_graph.svg
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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