^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) ================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) Devres - Managed Device Resource
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) ================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) Tejun Heo <teheo@suse.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) First draft 10 January 2007
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) .. contents
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 1. Intro : Huh? Devres?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 2. Devres : Devres in a nutshell
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 3. Devres Group : Group devres'es and release them together
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 4. Details : Life time rules, calling context, ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 5. Overhead : How much do we have to pay for this?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 6. List of managed interfaces: Currently implemented managed interfaces
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 1. Intro
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) --------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) devres came up while trying to convert libata to use iomap. Each
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) iomapped address should be kept and unmapped on driver detach. For
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) example, a plain SFF ATA controller (that is, good old PCI IDE) in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) native mode makes use of 5 PCI BARs and all of them should be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) maintained.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) As with many other device drivers, libata low level drivers have
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) sufficient bugs in ->remove and ->probe failure path. Well, yes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) that's probably because libata low level driver developers are lazy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) bunch, but aren't all low level driver developers? After spending a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) day fiddling with braindamaged hardware with no document or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) braindamaged document, if it's finally working, well, it's working.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) For one reason or another, low level drivers don't receive as much
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) attention or testing as core code, and bugs on driver detach or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) initialization failure don't happen often enough to be noticeable.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) Init failure path is worse because it's much less travelled while
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) needs to handle multiple entry points.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) So, many low level drivers end up leaking resources on driver detach
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) and having half broken failure path implementation in ->probe() which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) would leak resources or even cause oops when failure occurs. iomap
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) adds more to this mix. So do msi and msix.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 2. Devres
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) ---------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) devres is basically linked list of arbitrarily sized memory areas
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) associated with a struct device. Each devres entry is associated with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) a release function. A devres can be released in several ways. No
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) matter what, all devres entries are released on driver detach. On
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) release, the associated release function is invoked and then the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) devres entry is freed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) Managed interface is created for resources commonly used by device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) drivers using devres. For example, coherent DMA memory is acquired
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) using dma_alloc_coherent(). The managed version is called
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) dmam_alloc_coherent(). It is identical to dma_alloc_coherent() except
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) for the DMA memory allocated using it is managed and will be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) automatically released on driver detach. Implementation looks like
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) the following::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) struct dma_devres {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) size_t size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) void *vaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) dma_addr_t dma_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) static void dmam_coherent_release(struct device *dev, void *res)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) struct dma_devres *this = res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) dma_free_coherent(dev, this->size, this->vaddr, this->dma_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) dmam_alloc_coherent(dev, size, dma_handle, gfp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) struct dma_devres *dr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) void *vaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) dr = devres_alloc(dmam_coherent_release, sizeof(*dr), gfp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) /* alloc DMA memory as usual */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) vaddr = dma_alloc_coherent(...);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) /* record size, vaddr, dma_handle in dr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) dr->vaddr = vaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) devres_add(dev, dr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) return vaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) If a driver uses dmam_alloc_coherent(), the area is guaranteed to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) freed whether initialization fails half-way or the device gets
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) detached. If most resources are acquired using managed interface, a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) driver can have much simpler init and exit code. Init path basically
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) looks like the following::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) my_init_one()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) struct mydev *d;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) d = devm_kzalloc(dev, sizeof(*d), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) if (!d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) d->ring = dmam_alloc_coherent(...);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) if (!d->ring)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) if (check something)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) return register_to_upper_layer(d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) And exit path::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) my_remove_one()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) unregister_from_upper_layer(d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) shutdown_my_hardware();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) As shown above, low level drivers can be simplified a lot by using
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) devres. Complexity is shifted from less maintained low level drivers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) to better maintained higher layer. Also, as init failure path is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) shared with exit path, both can get more testing.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) Note though that when converting current calls or assignments to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) managed devm_* versions it is up to you to check if internal operations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) like allocating memory, have failed. Managed resources pertains to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) freeing of these resources *only* - all other checks needed are still
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) on you. In some cases this may mean introducing checks that were not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) necessary before moving to the managed devm_* calls.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 3. Devres group
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) Devres entries can be grouped using devres group. When a group is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) released, all contained normal devres entries and properly nested
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) groups are released. One usage is to rollback series of acquired
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) resources on failure. For example::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) if (!devres_open_group(dev, NULL, GFP_KERNEL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) acquire A;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) if (failed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) acquire B;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) if (failed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) devres_remove_group(dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) devres_release_group(dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) return err_code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) As resource acquisition failure usually means probe failure, constructs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) like above are usually useful in midlayer driver (e.g. libata core
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) layer) where interface function shouldn't have side effect on failure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) For LLDs, just returning error code suffices in most cases.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) Each group is identified by `void *id`. It can either be explicitly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) specified by @id argument to devres_open_group() or automatically
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) created by passing NULL as @id as in the above example. In both
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) cases, devres_open_group() returns the group's id. The returned id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) can be passed to other devres functions to select the target group.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) If NULL is given to those functions, the latest open group is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) selected.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) For example, you can do something like the following::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) int my_midlayer_create_something()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) if (!devres_open_group(dev, my_midlayer_create_something, GFP_KERNEL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) devres_close_group(dev, my_midlayer_create_something);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) void my_midlayer_destroy_something()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) devres_release_group(dev, my_midlayer_create_something);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 4. Details
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) ----------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) Lifetime of a devres entry begins on devres allocation and finishes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) when it is released or destroyed (removed and freed) - no reference
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) counting.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) devres core guarantees atomicity to all basic devres operations and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) has support for single-instance devres types (atomic
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) lookup-and-add-if-not-found). Other than that, synchronizing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) concurrent accesses to allocated devres data is caller's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) responsibility. This is usually non-issue because bus ops and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) resource allocations already do the job.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) For an example of single-instance devres type, read pcim_iomap_table()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) in lib/devres.c.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) All devres interface functions can be called without context if the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) right gfp mask is given.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 5. Overhead
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) -----------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) Each devres bookkeeping info is allocated together with requested data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) area. With debug option turned off, bookkeeping info occupies 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) bytes on 32bit machines and 24 bytes on 64bit (three pointers rounded
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) up to ull alignment). If singly linked list is used, it can be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) reduced to two pointers (8 bytes on 32bit, 16 bytes on 64bit).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) Each devres group occupies 8 pointers. It can be reduced to 6 if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) singly linked list is used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) Memory space overhead on ahci controller with two ports is between 300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) and 400 bytes on 32bit machine after naive conversion (we can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) certainly invest a bit more effort into libata core layer).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 6. List of managed interfaces
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) -----------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) CLOCK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) devm_clk_get()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) devm_clk_get_optional()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) devm_clk_put()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) devm_clk_bulk_get()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) devm_clk_bulk_get_all()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) devm_clk_bulk_get_optional()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) devm_get_clk_from_childl()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) devm_clk_hw_register()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) devm_of_clk_add_hw_provider()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) devm_clk_hw_register_clkdev()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) dmaenginem_async_device_register()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) dmam_alloc_coherent()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) dmam_alloc_attrs()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) dmam_free_coherent()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) dmam_pool_create()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) dmam_pool_destroy()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) DRM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) devm_drm_dev_alloc()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) devm_gpiod_get()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) devm_gpiod_get_array()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) devm_gpiod_get_array_optional()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) devm_gpiod_get_index()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) devm_gpiod_get_index_optional()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) devm_gpiod_get_optional()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) devm_gpiod_put()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) devm_gpiod_unhinge()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) devm_gpiochip_add_data()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) devm_gpio_request()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) devm_gpio_request_one()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) devm_gpio_free()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) I2C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) devm_i2c_new_dummy_device()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) IIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) devm_iio_device_alloc()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) devm_iio_device_register()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) devm_iio_kfifo_allocate()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) devm_iio_triggered_buffer_setup()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) devm_iio_trigger_alloc()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) devm_iio_trigger_register()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) devm_iio_channel_get()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) devm_iio_channel_get_all()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) INPUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) devm_input_allocate_device()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) IO region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) devm_release_mem_region()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) devm_release_region()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) devm_release_resource()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) devm_request_mem_region()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) devm_request_region()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) devm_request_resource()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) IOMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) devm_ioport_map()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) devm_ioport_unmap()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) devm_ioremap()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) devm_ioremap_uc()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) devm_ioremap_wc()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) devm_ioremap_resource() : checks resource, requests memory region, ioremaps
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) devm_ioremap_resource_wc()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) devm_platform_ioremap_resource() : calls devm_ioremap_resource() for platform device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) devm_platform_ioremap_resource_wc()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) devm_platform_ioremap_resource_byname()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) devm_platform_get_and_ioremap_resource()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) devm_iounmap()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) pcim_iomap()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) pcim_iomap_regions() : do request_region() and iomap() on multiple BARs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) pcim_iomap_table() : array of mapped addresses indexed by BAR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) pcim_iounmap()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) devm_free_irq()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) devm_request_any_context_irq()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) devm_request_irq()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) devm_request_threaded_irq()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) devm_irq_alloc_descs()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) devm_irq_alloc_desc()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) devm_irq_alloc_desc_at()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) devm_irq_alloc_desc_from()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) devm_irq_alloc_descs_from()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) devm_irq_alloc_generic_chip()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) devm_irq_setup_generic_chip()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) devm_irq_sim_init()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) LED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) devm_led_classdev_register()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) devm_led_classdev_unregister()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) MDIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) devm_mdiobus_alloc()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) devm_mdiobus_alloc_size()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) devm_mdiobus_register()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) devm_of_mdiobus_register()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) MEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) devm_free_pages()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) devm_get_free_pages()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) devm_kasprintf()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) devm_kcalloc()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) devm_kfree()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) devm_kmalloc()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) devm_kmalloc_array()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) devm_kmemdup()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) devm_krealloc()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) devm_kstrdup()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) devm_kvasprintf()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) devm_kzalloc()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) MFD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) devm_mfd_add_devices()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) MUX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) devm_mux_chip_alloc()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) devm_mux_chip_register()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) devm_mux_control_get()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) NET
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) devm_alloc_etherdev()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) devm_alloc_etherdev_mqs()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) devm_register_netdev()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) PER-CPU MEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) devm_alloc_percpu()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) devm_free_percpu()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) devm_pci_alloc_host_bridge() : managed PCI host bridge allocation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) devm_pci_remap_cfgspace() : ioremap PCI configuration space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) devm_pci_remap_cfg_resource() : ioremap PCI configuration space resource
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) pcim_enable_device() : after success, all PCI ops become managed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) pcim_pin_device() : keep PCI device enabled after release
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) PHY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) devm_usb_get_phy()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) devm_usb_put_phy()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) PINCTRL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) devm_pinctrl_get()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) devm_pinctrl_put()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) devm_pinctrl_register()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) devm_pinctrl_unregister()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) POWER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) devm_reboot_mode_register()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) devm_reboot_mode_unregister()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) PWM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) devm_pwm_get()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) devm_pwm_put()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) REGULATOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) devm_regulator_bulk_get()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) devm_regulator_get()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) devm_regulator_put()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) devm_regulator_register()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) RESET
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) devm_reset_control_get()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) devm_reset_controller_register()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) SERDEV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) devm_serdev_device_open()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) SLAVE DMA ENGINE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) devm_acpi_dma_controller_register()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) SPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) devm_spi_register_master()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) WATCHDOG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) devm_watchdog_register_device()
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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