^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) Technologic Systems Watchdog
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) - compatible: must be "technologic,ts4800-wdt"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) - syscon: phandle / integer array that points to the syscon node which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) describes the FPGA's syscon registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) - phandle to FPGA's syscon
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) - offset to the watchdog register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) Optional property:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - timeout-sec: contains the watchdog timeout in seconds.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) syscon: syscon@b0010000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) compatible = "syscon", "simple-mfd";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) reg = <0xb0010000 0x3d>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) reg-io-width = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) wdt@e {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) compatible = "technologic,ts4800-wdt";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) syscon = <&syscon 0xe>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) timeout-sec = <10>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) }