Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) Xilinx AXI/PLB soft-core watchdog Device Tree Bindings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) ---------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) - compatible		: Should be "xlnx,xps-timebase-wdt-1.00.a" or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 			  "xlnx,xps-timebase-wdt-1.01.a".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) - reg			: Physical base address and size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - clocks		: Input clock specifier. Refer to common clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 			  bindings.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - clock-frequency	: Frequency of clock in Hz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) - xlnx,wdt-enable-once	: 0 - Watchdog can be restarted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 			  1 - Watchdog can be enabled just once
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) - xlnx,wdt-interval	: Watchdog timeout interval in 2^<val> clock cycles,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 			  <val> is integer from 8 to 31.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) axi-timebase-wdt@40100000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	clock-frequency = <50000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	compatible = "xlnx,xps-timebase-wdt-1.00.a";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	clocks = <&clkc 15>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	reg = <0x40100000 0x10000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	xlnx,wdt-enable-once = <0x0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	xlnx,wdt-interval = <0x1b>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) } ;