Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) * Freescale mpc8xxx watchdog driver (For 83xx, 86xx and 8xx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) - compatible: Shall contain one of the following:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 	"mpc83xx_wdt" for an mpc83xx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 	"fsl,mpc8610-wdt" for an mpc86xx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 	"fsl,mpc823-wdt" for an mpc8xx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) - reg: base physical address and length of the area hosting the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)        watchdog registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 		On the 83xx, "Watchdog Timer Registers" area:	<0x200 0x100>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 		On the 86xx, "Watchdog Timer Registers" area:	<0xe4000 0x100>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 		On the 8xx, "General System Interface Unit" area: <0x0 0x10>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) - reg: additional physical address and length (4) of location of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)        Reset Status Register (called RSTRSCR on the mpc86xx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 		On the 83xx, it is located at offset 0x910
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 		On the 86xx, it is located at offset 0xe0094
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 		On the 8xx, it is located at offset 0x288
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 		WDT: watchdog@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 		    compatible = "fsl,mpc823-wdt";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 		    reg = <0x0 0x10 0x288 0x4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 		};