^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) Bindings for MEN A21 Watchdog device connected to GPIO lines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) - compatible: "men,a021-wdt"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) - gpios: Specifies the pins that control the Watchdog, order:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) 1: Watchdog enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) 2: Watchdog fast-mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) 3: Watchdog trigger
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) 4: Watchdog reset cause bit 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 5: Watchdog reset cause bit 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 6: Watchdog reset cause bit 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) - None
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) watchdog {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) compatible ="men,a021-wdt";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) gpios = <&gpio3 9 1 /* WD_EN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) &gpio3 10 1 /* WD_FAST */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) &gpio3 11 1 /* WD_TRIG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) &gpio3 6 1 /* RST_CAUSE[0] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) &gpio3 7 1 /* RST_CAUSE[1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) &gpio3 8 1>; /* RST_CAUSE[2] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) };