^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) * NXP LPC18xx Watchdog Timer (WDT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) - compatible: Should be "nxp,lpc1850-wwdt"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) - reg: Should contain WDT registers location and length
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) - clocks: Must contain an entry for each entry in clock-names.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) - clock-names: Should contain "wdtclk" and "reg"; the watchdog counter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) clock and register interface clock respectively.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) - interrupts: Should contain WDT interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) Examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) watchdog@40080000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) compatible = "nxp,lpc1850-wwdt";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) reg = <0x40080000 0x24>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) clocks = <&cgu BASE_SAFE_CLK>, <&ccu1 CLK_CPU_WWDT>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) clock-names = "wdtclk", "reg";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) interrupts = <49>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) };