Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) %YAML 1.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) ---
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) $id: http://devicetree.org/schemas/watchdog/fsl-imx7ulp-wdt.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) $schema: http://devicetree.org/meta-schemas/core.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) title: Freescale i.MX7ULP Watchdog Timer (WDT) Controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) maintainers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)   - Anson Huang <Anson.Huang@nxp.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) allOf:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)   - $ref: "watchdog.yaml#"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)   compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)     enum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)       - fsl,imx7ulp-wdt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)   reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)     maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)   interrupts:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)     maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)   clocks:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)     maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)   assigned-clocks:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)     maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)   assigned-clocks-parents:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)     maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)   timeout-sec: true
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)   - compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)   - interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)   - reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)   - clocks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) additionalProperties: false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)   - |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)     #include <dt-bindings/interrupt-controller/arm-gic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)     #include <dt-bindings/clock/imx7ulp-clock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)     watchdog@403d0000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)         compatible = "fsl,imx7ulp-wdt";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)         reg = <0x403d0000 0x10000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)         interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)         clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)         assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)         assigned-clocks-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)         timeout-sec = <40>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)     };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) ...