^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) SMSC USB3503 High-Speed Hub Controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) - compatible: Should be "smsc,usb3503" or "smsc,usb3503a".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) - reg: Specifies the i2c slave address, it is required and should be 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) if I2C is used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) - connect-gpios: Should specify GPIO for connect.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - disabled-ports: Should specify the ports unused.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) '1' or '2' or '3' are available for this property to describe the port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) number. 1~3 property values are possible to be described.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) Do not describe this property if all ports have to be enabled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) - intn-gpios: Should specify GPIO for interrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) - reset-gpios: Should specify GPIO for reset.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) - initial-mode: Should specify initial mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) (1 for HUB mode, 2 for STANDBY mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) - refclk: Clock used for driving REFCLK signal (optional, if not provided
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) the driver assumes that clock signal is always available, its
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) rate is specified by REF_SEL pins and a value from the primary
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) reference clock frequencies table is used). Use clocks and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) clock-names in order to assign it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) - refclk-frequency: Frequency of the REFCLK signal as defined by REF_SEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) pins (optional, if not provided, driver will not set rate of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) REFCLK signal and assume that a value from the primary reference
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) clock frequencies table is used)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) Examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) usb3503@8 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) compatible = "smsc,usb3503";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) reg = <0x08>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) connect-gpios = <&gpx3 0 1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) disabled-ports = <2 3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) intn-gpios = <&gpx3 4 1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) reset-gpios = <&gpx3 5 1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) initial-mode = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) clocks = <&clks 80>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) clock-names = "refclk";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) };