^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) USB NOP PHY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) - compatible: should be usb-nop-xceiv
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) - #phy-cells: Must be 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) - clocks: phandle to the PHY clock. Use as per Documentation/devicetree
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) /bindings/clock/clock-bindings.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) This property is required if clock-frequency is specified.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - clock-names: Should be "main_clk"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) - clock-frequency: the clock frequency (in Hz) that the PHY clock must
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) be configured to.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) - vcc-supply: phandle to the regulator that provides power to the PHY.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) - reset-gpios: Should specify the GPIO for reset.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) - vbus-detect-gpio: should specify the GPIO detecting a VBus insertion
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) (see Documentation/devicetree/bindings/gpio/gpio.txt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) - vbus-regulator : should specifiy the regulator supplying current drawn from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) the VBus line (see Documentation/devicetree/bindings/regulator/regulator.txt).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) hsusb1_phy {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) compatible = "usb-nop-xceiv";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) clock-frequency = <19200000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) clocks = <&osc 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) clock-names = "main_clk";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) vcc-supply = <&hsusb1_vcc_regulator>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) reset-gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) vbus-detect-gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) vbus-regulator = <&vbus_regulator>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #phy-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) hsusb1_phy is a NOP USB PHY device that gets its clock from an oscillator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) and expects that clock to be configured to 19.2MHz by the NOP PHY driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) hsusb1_vcc_regulator provides power to the PHY and GPIO 7 controls RESET.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) GPIO 13 detects VBus insertion, and accordingly notifies the vbus-regulator.