^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) Xilinx USB2 device controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) - compatible : Should be "xlnx,usb2-device-4.00.a"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) - reg : Physical base address and size of the USB2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) device registers map.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) - interrupts : Should contain single irq line of USB2 device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) - xlnx,has-builtin-dma : if DMA is included
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) axi-usb2-device@42e00000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) compatible = "xlnx,usb2-device-4.00.a";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) interrupts = <0x0 0x39 0x1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) reg = <0x42e00000 0x10000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) xlnx,has-builtin-dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)