^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) Samsung Exynos SoC USB controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) The USB devices interface with USB controllers on Exynos SOCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) The device node has following properties.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) EHCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) - compatible: should be "samsung,exynos4210-ehci" for USB 2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) EHCI controller in host mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - reg: physical base address of the controller and length of memory mapped
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) region.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - interrupts: interrupt number to the cpu.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) - clocks: from common clock binding: handle to usb clock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) - clock-names: from common clock binding: Shall be "usbhost".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) - phys: from the *Generic PHY* bindings; array specifying phy(s) used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) by the root port.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) - phy-names: from the *Generic PHY* bindings; array of the names for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) each phy for the root ports, must be a subset of the following:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) "host", "hsic0", "hsic1".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) - samsung,vbus-gpio: if present, specifies the GPIO that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) needs to be pulled up for the bus to be powered.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) usb@12110000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) compatible = "samsung,exynos4210-ehci";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) reg = <0x12110000 0x100>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) interrupts = <0 71 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) samsung,vbus-gpio = <&gpx2 6 1 3 3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) clocks = <&clock 285>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) clock-names = "usbhost";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) phys = <&usb2phy 1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) phy-names = "host";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) OHCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) - compatible: should be "samsung,exynos4210-ohci" for USB 2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) OHCI companion controller in host mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) - reg: physical base address of the controller and length of memory mapped
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) region.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) - interrupts: interrupt number to the cpu.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) - clocks: from common clock binding: handle to usb clock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) - clock-names: from common clock binding: Shall be "usbhost".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) - phys: from the *Generic PHY* bindings; array specifying phy(s) used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) by the root port.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) - phy-names: from the *Generic PHY* bindings; array of the names for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) each phy for the root ports, must be a subset of the following:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) "host", "hsic0", "hsic1".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) usb@12120000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) compatible = "samsung,exynos4210-ohci";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) reg = <0x12120000 0x100>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) interrupts = <0 71 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) clocks = <&clock 285>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) clock-names = "usbhost";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) phys = <&usb2phy 1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) phy-names = "host";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) DWC3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) - compatible: should be one of the following -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) "samsung,exynos5250-dwusb3": for USB 3.0 DWC3 controller on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) Exynos5250/5420.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) "samsung,exynos5433-dwusb3": for USB 3.0 DWC3 controller on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) Exynos5433.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) "samsung,exynos7-dwusb3": for USB 3.0 DWC3 controller on Exynos7.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) - #address-cells, #size-cells : should be '1' if the device has sub-nodes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) with 'reg' property.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) - ranges: allows valid 1:1 translation between child's address space and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) parent's address space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) - clocks: Clock IDs array as required by the controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) - clock-names: Names of clocks corresponding to IDs in the clock property.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) Following clock names shall be provided for different
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) compatibles:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) - samsung,exynos5250-dwusb3: "usbdrd30",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) - samsung,exynos5433-dwusb3: "aclk", "susp_clk", "pipe_pclk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) "phyclk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) - samsung,exynos7-dwusb3: "usbdrd30", "usbdrd30_susp_clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) "usbdrd30_axius_clk"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) - vdd10-supply: 1.0V powr supply
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) - vdd33-supply: 3.0V/3.3V power supply
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) Sub-nodes:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) The dwc3 core should be added as subnode to Exynos dwc3 glue.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) - dwc3 :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) The binding details of dwc3 can be found in:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) Documentation/devicetree/bindings/usb/dwc3.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) usb@12000000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) compatible = "samsung,exynos5250-dwusb3";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) clocks = <&clock 286>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) clock-names = "usbdrd30";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #size-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) ranges;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) vdd10-supply = <&ldo11_reg>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) vdd33-supply = <&ldo9_reg>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) dwc3 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) compatible = "synopsys,dwc3";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) reg = <0x12000000 0x10000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) interrupts = <0 72 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) usb-phy = <&usb2_phy &usb3_phy>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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