Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) ST DWC3 glue logic
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) This file documents the parameters for the dwc3-st driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) This driver controls the glue logic used to configure the dwc3 core on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) STiH407 based platforms.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  - compatible	: must be "st,stih407-dwc3"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  - reg		: glue logic base address and USB syscfg ctrl register offset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  - reg-names	: should be "reg-glue" and "syscfg-reg"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)  - st,syscon	: should be phandle to system configuration node which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 		  encompasses the glue registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)  - resets	: list of phandle and reset specifier pairs. There should be two entries, one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 		  for the powerdown and softreset lines of the usb3 IP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)  - reset-names	: list of reset signal names. Names should be "powerdown" and "softreset"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) See: Documentation/devicetree/bindings/reset/st,sti-powerdown.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) See: Documentation/devicetree/bindings/reset/reset.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)  - #address-cells, #size-cells : should be '1' if the device has sub-nodes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)    with 'reg' property
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)  - pinctl-names	: A pinctrl state named "default" must be defined
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)  - pinctrl-0	: Pin control group
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)  - ranges	: allows valid 1:1 translation between child's address space and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 		  parent's address space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) Sub-nodes:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) The dwc3 core should be added as subnode to ST DWC3 glue as shown in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) example below. The DT binding details of dwc3 can be found in:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) Documentation/devicetree/bindings/usb/dwc3.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) NB: The dr_mode property described in [1] is NOT optional for this driver, as the default value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) is "otg", which isn't supported by this SoC. Valid dr_mode values for dwc3-st are either "host"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) or "device".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) [1] Documentation/devicetree/bindings/usb/generic.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) st_dwc3: dwc3@8f94000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	compatible	= "st,stih407-dwc3";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	reg		= <0x08f94000 0x1000>, <0x110 0x4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	reg-names	= "reg-glue", "syscfg-reg";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	st,syscfg	= <&syscfg_core>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	resets		= <&powerdown STIH407_USB3_POWERDOWN>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 			  <&softreset STIH407_MIPHY2_SOFTRESET>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	reset-names	= "powerdown", "softreset";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	#address-cells	= <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	#size-cells	= <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	pinctrl-names	= "default";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 	pinctrl-0	= <&pinctrl_usb3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	ranges;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	dwc3: dwc3@9900000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 		compatible	= "snps,dwc3";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 		reg		= <0x09900000 0x100000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 		interrupts	= <GIC_SPI 155 IRQ_TYPE_NONE>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 		dr_mode		= "host";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 		phy-names	= "usb2-phy", "usb3-phy";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 		phys		= <&usb2_picophy2>, <&phy_port2 PHY_TYPE_USB3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) };