^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) TI DA8xx MUSB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) ~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) For DA8xx/OMAP-L1x/AM17xx/AM18xx platforms.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) ~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) - compatible : Should be set to "ti,da830-musb".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) - reg: Offset and length of the USB controller register set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - interrupts: The USB interrupt number.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) - interrupt-names: Should be set to "mc".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) - dr_mode: The USB operation mode. Should be one of "host", "peripheral" or "otg".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) - phys: Phandle for the PHY device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) - phy-names: Should be "usb-phy"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) - dmas: specifies the dma channels
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) - dma-names: specifies the names of the channels. Use "rxN" for receive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) and "txN" for transmit endpoints. N specifies the endpoint number.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) ~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) - vbus-supply: Phandle to a regulator providing the USB bus power.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) ~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) - compatible: ti,da830-cppi41
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) - reg: offset and length of the following register spaces: CPPI DMA Controller,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) CPPI DMA Scheduler, Queue Manager
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) - reg-names: "controller", "scheduler", "queuemgr"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) - #dma-cells: should be set to 2. The first number represents the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) channel number (0 … 3 for endpoints 1 … 4).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) The second number is 0 for RX and 1 for TX transfers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) - #dma-channels: should be set to 4 representing the 4 endpoints.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) usb_phy: usb-phy {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) compatible = "ti,da830-usb-phy";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #phy-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) usb0: usb@200000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) compatible = "ti,da830-musb";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) reg = <0x00200000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) ranges;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #size-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) interrupts = <58>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) interrupt-names = "mc";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) dr_mode = "host";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) vbus-supply = <&usb_vbus>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) phys = <&usb_phy 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) phy-names = "usb-phy";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) dmas = <&cppi41dma 0 0 &cppi41dma 1 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) &cppi41dma 2 0 &cppi41dma 3 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) &cppi41dma 0 1 &cppi41dma 1 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) &cppi41dma 2 1 &cppi41dma 3 1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) dma-names =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) "rx1", "rx2", "rx3", "rx4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) "tx1", "tx2", "tx3", "tx4";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) cppi41dma: dma-controller@201000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) compatible = "ti,da830-cppi41";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) reg = <0x201000 0x1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 0x202000 0x1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 0x204000 0x4000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) reg-names = "controller", "scheduler", "queuemgr";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) interrupts = <58>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #dma-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #dma-channels = <4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) };