^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) * Exynos Thermal Management Unit (TMU)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) ** Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) - compatible : One of the following:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) "samsung,exynos3250-tmu"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) "samsung,exynos4412-tmu"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) "samsung,exynos4210-tmu"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) "samsung,exynos5250-tmu"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) "samsung,exynos5260-tmu"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) "samsung,exynos5420-tmu" for TMU channel 0, 1 on Exynos5420
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) "samsung,exynos5420-tmu-ext-triminfo" for TMU channels 2, 3 and 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) Exynos5420 (Must pass triminfo base and triminfo clock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) "samsung,exynos5433-tmu"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) "samsung,exynos7-tmu"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) - reg : Address range of the thermal registers. For soc's which has multiple
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) instances of TMU and some registers are shared across all TMU's like
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) interrupt related then 2 set of register has to supplied. First set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) belongs to register set of TMU instance and second set belongs to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) registers shared with the TMU instance.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) NOTE: On Exynos5420, the TRIMINFO register is misplaced for TMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) channels 2, 3 and 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) Use "samsung,exynos5420-tmu-ext-triminfo" in cases, there is a misplaced
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) register, also provide clock to access that base.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) TRIMINFO at 0x1006c000 contains data for TMU channel 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) TRIMINFO at 0x100a0000 contains data for TMU channel 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) TRIMINFO at 0x10068000 contains data for TMU channel 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) - interrupts : Should contain interrupt for thermal system
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) - clocks : The main clocks for TMU device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) -- 1. operational clock for TMU channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) -- 2. optional clock to access the shared registers of TMU channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) -- 3. optional special clock for functional operation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) - clock-names : Thermal system clock name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) -- "tmu_apbif" operational clock for current TMU channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) -- "tmu_triminfo_apbif" clock to access the shared triminfo register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) for current TMU channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) -- "tmu_sclk" clock for functional operation of the current TMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) The Exynos TMU supports generating interrupts when reaching given
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) temperature thresholds. Number of supported thermal trip points depends
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) on the SoC (only first trip points defined in DT will be configured):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) - most of SoC: 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) - samsung,exynos5433-tmu: 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) - samsung,exynos7-tmu: 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) ** Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) - vtmu-supply: This entry is optional and provides the regulator node supplying
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) voltage to TMU. If needed this entry can be placed inside
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) board/platform specific dts file.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) Example 1):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) tmu@100c0000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) compatible = "samsung,exynos4412-tmu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) interrupt-parent = <&combiner>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) reg = <0x100C0000 0x100>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) interrupts = <2 4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) clocks = <&clock 383>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) clock-names = "tmu_apbif";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) vtmu-supply = <&tmu_regulator_node>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #thermal-sensor-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) Example 2): (In case of Exynos5420 "with misplaced TRIMINFO register")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) tmu_cpu2: tmu@10068000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) compatible = "samsung,exynos5420-tmu-ext-triminfo";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) reg = <0x10068000 0x100>, <0x1006c000 0x4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) interrupts = <0 184 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) clocks = <&clock 318>, <&clock 318>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) clock-names = "tmu_apbif", "tmu_triminfo_apbif";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #thermal-sensor-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) tmu_cpu3: tmu@1006c000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) compatible = "samsung,exynos5420-tmu-ext-triminfo";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) interrupts = <0 185 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) clocks = <&clock 318>, <&clock 319>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) clock-names = "tmu_apbif", "tmu_triminfo_apbif";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #thermal-sensor-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) tmu_gpu: tmu@100a0000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) compatible = "samsung,exynos5420-tmu-ext-triminfo";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) reg = <0x100a0000 0x100>, <0x10068000 0x4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) interrupts = <0 215 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) clocks = <&clock 319>, <&clock 318>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) clock-names = "tmu_apbif", "tmu_triminfo_apbif";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #thermal-sensor-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) Note: For multi-instance tmu each instance should have an alias correctly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) numbered in "aliases" node.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) aliases {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) tmuctrl0 = &tmuctrl_0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) tmuctrl1 = &tmuctrl_1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) tmuctrl2 = &tmuctrl_2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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