Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) Spreadtrum SPI Controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) - compatible: Should be "sprd,sc9860-spi".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) - reg: Offset and length of SPI controller register space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) - interrupts: Should contain SPI interrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) - clock-names: Should contain following entries:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 	"spi" for SPI clock,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 	"source" for SPI source (parent) clock,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 	"enable" for SPI module enable clock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - clocks: List of clock input name strings sorted in the same order
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 	as the clock-names property.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) - #address-cells: The number of cells required to define a chip select
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 	address on the SPI bus. Should be set to 1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) - #size-cells: Should be set to 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) dma-names: Should contain names of the SPI used DMA channel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) dmas: Should contain DMA channels and DMA slave ids which the SPI used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	sorted in the same order as the dma-names property.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) spi0: spi@70a00000{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	compatible = "sprd,sc9860-spi";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	reg = <0 0x70a00000 0 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	clock-names = "spi", "source","enable";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	clocks = <&clk_spi0>, <&ext_26m>, <&clk_ap_apb_gates 5>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	dma-names = "rx_chn", "tx_chn";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	dmas = <&apdma 11 11>, <&apdma 12 12>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	#address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	#size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) };