^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) * Samsung SPI Controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) The Samsung SPI controller is used to interface with various devices such as flash
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) and display controllers using the SPI communication interface.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) Required SoC Specific Properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) - compatible: should be one of the following.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) - samsung,s3c2443-spi: for s3c2443, s3c2416 and s3c2450 platforms
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - samsung,s3c6410-spi: for s3c6410 platforms
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - samsung,s5pv210-spi: for s5pv210 and s5pc110 platforms
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - samsung,exynos5433-spi: for exynos5433 compatible controllers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) - samsung,exynos7-spi: for exynos7 platforms <DEPRECATED>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) - reg: physical base address of the controller and length of memory mapped
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) region.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) - interrupts: The interrupt number to the cpu. The interrupt specifier format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) depends on the interrupt controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) - dmas : Two or more DMA channel specifiers following the convention outlined
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) in bindings/dma/dma.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) - dma-names: Names for the dma channels. There must be at least one channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) named "tx" for transmit and named "rx" for receive.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) - clocks: specifies the clock IDs provided to the SPI controller; they are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) required for interacting with the controller itself, for synchronizing the bus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) and as I/O clock (the latter is required by exynos5433 and exynos7).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) - clock-names: string names of the clocks in the 'clocks' property; for all the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) the devices the names must be "spi", "spi_busclkN" (where N is determined by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) "samsung,spi-src-clk"), while Exynos5433 should specify a third clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) "spi_ioclk" for the I/O clock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) Required Board Specific Properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) - #address-cells: should be 1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) - #size-cells: should be 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) Optional Board Specific Properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) - samsung,spi-src-clk: If the spi controller includes a internal clock mux to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) select the clock source for the spi bus clock, this property can be used to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) indicate the clock to be used for driving the spi bus clock. If not specified,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) the clock number 0 is used as default.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) - num-cs: Specifies the number of chip select lines supported. If
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) not specified, the default number of chip select lines is set to 1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) - cs-gpios: should specify GPIOs used for chipselects (see spi-bus.txt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) - no-cs-readback: the CS line is disconnected, therefore the device should not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) operate based on CS signalling.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) SPI Controller specific data in SPI slave nodes:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) - The spi slave nodes should provide the following information which is required
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) by the spi controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) - samsung,spi-feedback-delay: The sampling phase shift to be applied on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) miso line (to account for any lag in the miso line). The following are the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) valid values.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) - 0: No phase shift.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) - 1: 90 degree phase shift sampling.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) - 2: 180 degree phase shift sampling.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) - 3: 270 degree phase shift sampling.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) Aliases:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) - All the SPI controller nodes should be represented in the aliases node using
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) the following format 'spi{n}' where n is a unique number for the alias.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) - SoC Specific Portion:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) spi_0: spi@12d20000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) compatible = "samsung,exynos4210-spi";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) reg = <0x12d20000 0x100>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) interrupts = <0 66 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) dmas = <&pdma0 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) &pdma0 4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) dma-names = "tx", "rx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) - Board Specific Portion:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) spi_0: spi@12d20000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) pinctrl-names = "default";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) pinctrl-0 = <&spi0_bus>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) cs-gpios = <&gpa2 5 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) w25q80bw@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #size-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) compatible = "w25x80";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) reg = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) spi-max-frequency = <10000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) controller-data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) samsung,spi-feedback-delay = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) partition@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) label = "U-Boot";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) reg = <0x0 0x40000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) read-only;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) partition@40000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) label = "Kernel";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) reg = <0x40000 0xc0000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags