^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) # SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) %YAML 1.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) ---
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) $id: http://devicetree.org/schemas/spi/spi-pl022.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) $schema: http://devicetree.org/meta-schemas/core.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) title: ARM PL022 SPI controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) maintainers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - Linus Walleij <linus.walleij@linaro.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) allOf:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) - $ref: "spi-controller.yaml#"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) # We need a select here so we don't match all nodes with 'arm,primecell'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) select:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) contains:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) const: arm,pl022
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) - compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) - const: arm,pl022
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) - const: arm,primecell
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) interrupts:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) clocks:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) maxItems: 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) clock-names:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) - enum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) - SSPCLK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) - sspclk
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) - const: apb_pclk
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) pl022,autosuspend-delay:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) description: delay in ms following transfer completion before the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) runtime power management system suspends the device. A setting of 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) indicates no delay and the device will be suspended immediately.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) $ref: "/schemas/types.yaml#/definitions/uint32"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) pl022,rt:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) description: indicates the controller should run the message pump with realtime
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) priority to minimise the transfer latency on the bus (boolean)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) type: boolean
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) dmas:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) Two or more DMA channel specifiers following the convention outlined
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) in bindings/dma/dma.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) minItems: 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) maxItems: 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) dma-names:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) There must be at least one channel named "tx" for transmit and named "rx"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) for receive.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) minItems: 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) maxItems: 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) additionalItems: true
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) - const: rx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) - const: tx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) patternProperties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) "^[a-zA-Z][a-zA-Z0-9,+\\-._]{0,63}@[0-9a-f]+$":
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) type: object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) # SPI slave nodes must be children of the SPI master node and can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) # contain the following properties.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) pl022,interface:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) description: SPI interface type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) $ref: "/schemas/types.yaml#/definitions/uint32"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) enum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) - 0 # SPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) - 1 # Texas Instruments Synchronous Serial Frame Format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) - 2 # Microwire (Half Duplex)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) pl022,com-mode:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) description: Specifies the transfer mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) $ref: "/schemas/types.yaml#/definitions/uint32"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) enum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) - 0 # interrupt mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) - 1 # polling mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) - 2 # DMA mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) default: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) pl022,rx-level-trig:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) description: Rx FIFO watermark level
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) $ref: "/schemas/types.yaml#/definitions/uint32"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) minimum: 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) maximum: 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) pl022,tx-level-trig:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) description: Tx FIFO watermark level
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) $ref: "/schemas/types.yaml#/definitions/uint32"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) minimum: 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) maximum: 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) pl022,ctrl-len:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) description: Microwire interface - Control length
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) $ref: "/schemas/types.yaml#/definitions/uint32"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) minimum: 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) maximum: 0x1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) pl022,wait-state:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) description: Microwire interface - Wait state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) $ref: "/schemas/types.yaml#/definitions/uint32"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) enum: [0, 1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) pl022,duplex:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) description: Microwire interface - Full/Half duplex
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) $ref: "/schemas/types.yaml#/definitions/uint32"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) enum: [0, 1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) - compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) - reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) - interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) unevaluatedProperties: false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) - |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) spi@e0100000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) compatible = "arm,pl022", "arm,primecell";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) reg = <0xe0100000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) interrupts = <0 31 0x4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) dmas = <&dma_controller 23 1>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) <&dma_controller 24 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) dma-names = "rx", "tx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) m25p80@1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) compatible = "st,m25p80";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) reg = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) spi-max-frequency = <12000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) spi-cpol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) spi-cpha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) pl022,interface = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) pl022,com-mode = <0x2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) pl022,rx-level-trig = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) pl022,tx-level-trig = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) pl022,ctrl-len = <0x11>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) pl022,wait-state = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) pl022,duplex = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) ...
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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