Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) Macronix SPI controller Device Tree Bindings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) --------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) - compatible: should be "mxicy,mx25f0a-spi"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) - #address-cells: should be 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) - #size-cells: should be 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) - reg: should contain 2 entries, one for the registers and one for the direct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)        mapping area
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - reg-names: should contain "regs" and "dirmap"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - clock-names: should contain "ps_clk", "send_clk" and "send_dly_clk"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - clocks: should contain 3 entries for the "ps_clk", "send_clk" and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 	  "send_dly_clk" clocks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) - interrupts: interrupt line connected to the SPI controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	spi@43c30000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 		compatible = "mxicy,mx25f0a-spi";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 		reg = <0x43c30000 0x10000>, <0xa0000000 0x20000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 		reg-names = "regs", "dirmap";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 		clocks = <&clkwizard 0>, <&clkwizard 1>, <&clkc 18>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 		clock-names = "send_clk", "send_dly_clk", "ps_clk";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 		#address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 		#size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 		flash@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 			compatible = "jedec,spi-nor";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 			reg = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 			spi-max-frequency = <25000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 			spi-tx-bus-width = <4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 			spi-rx-bus-width = <4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 		};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	};