Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) %YAML 1.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) ---
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) $id: http://devicetree.org/schemas/spi/spi-fsl-lpspi.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) $schema: http://devicetree.org/meta-schemas/core.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) title: Freescale Low Power SPI (LPSPI) for i.MX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) maintainers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)   - Anson Huang <Anson.Huang@nxp.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) allOf:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)   - $ref: "/schemas/spi/spi-controller.yaml#"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)   compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)     enum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)       - fsl,imx7ulp-spi
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)       - fsl,imx8qxp-spi
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)   reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)     maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)   interrupts:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)     maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)   clocks:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)     items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)       - description: SoC SPI per clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)       - description: SoC SPI ipg clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)   clock-names:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)     items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)       - const: per
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)       - const: ipg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)   fsl,spi-only-use-cs1-sel:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)       spi common code does not support use of CS signals discontinuously.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)       i.MX8DXL-EVK board only uses CS1 without using CS0. Therefore, add
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)       this property to re-config the chipselect value in the LPSPI driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)     type: boolean
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)   - compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)   - reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)   - interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)   - clocks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)   - clock-names
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) unevaluatedProperties: false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)   - |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)     #include <dt-bindings/clock/imx7ulp-clock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)     #include <dt-bindings/interrupt-controller/arm-gic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)     spi@40290000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)         compatible = "fsl,imx7ulp-spi";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)         reg = <0x40290000 0x10000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)         interrupt-parent = <&intc>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)         interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)         clocks = <&clks IMX7ULP_CLK_LPSPI2>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)                  <&clks IMX7ULP_CLK_DUMMY>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)         clock-names = "per", "ipg";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)         spi-slave;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)         fsl,spi-only-use-cs1-sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)     };