^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) # SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) %YAML 1.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) ---
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) $id: http://devicetree.org/schemas/spi/spi-controller.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) $schema: http://devicetree.org/meta-schemas/core.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) title: SPI Controller Generic Binding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) maintainers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - Mark Brown <broonie@kernel.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) description: |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) SPI busses can be described with a node for the SPI controller device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) and a set of child nodes for each SPI slave on the bus. The system SPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) controller may be described for use in SPI master mode or in SPI slave mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) but not for both at the same time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) $nodename:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) pattern: "^spi(@.*|-[0-9a-f])*$"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) "#address-cells":
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) enum: [0, 1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) "#size-cells":
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) const: 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) cs-gpios:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) description: |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) GPIOs used as chip selects.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) If that property is used, the number of chip selects will be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) increased automatically with max(cs-gpios, hardware chip selects).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) So if, for example, the controller has 4 CS lines, and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) cs-gpios looks like this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) cs-gpios = <&gpio1 0 0>, <0>, <&gpio1 1 0>, <&gpio1 2 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) Then it should be configured so that num_chipselect = 4, with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) the following mapping
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) cs0 : &gpio1 0 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) cs1 : native
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) cs2 : &gpio1 1 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) cs3 : &gpio1 2 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) num-cs:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) $ref: /schemas/types.yaml#/definitions/uint32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) Total number of chip selects.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) spi-slave:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) The SPI controller acts as a slave, instead of a master.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) allOf:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) - if:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) not:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) - spi-slave
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) then:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) "#address-cells":
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) const: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) else:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) "#address-cells":
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) const: 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) patternProperties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) "^slave$":
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) type: object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) Compatible of the SPI device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) - compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) "^.*@[0-9a-f]+$":
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) type: object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) Compatible of the SPI device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) minimum: 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) maximum: 256
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) Chip select used by the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) spi-3wire:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) The device requires 3-wire mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) spi-cpha:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) The device requires shifted clock phase (CPHA) mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) spi-cpol:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) The device requires inverse clock polarity (CPOL) mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) spi-cs-high:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) The device requires the chip select active high.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) spi-lsb-first:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) The device requires the LSB first mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) spi-max-frequency:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) $ref: /schemas/types.yaml#/definitions/uint32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) Maximum SPI clocking speed of the device in Hz.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) spi-rx-bus-width:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) Bus width to the SPI bus used for read transfers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) $ref: /schemas/types.yaml#/definitions/uint32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) enum: [1, 2, 4, 8]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) default: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) spi-rx-delay-us:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) Delay, in microseconds, after a read transfer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) spi-tx-bus-width:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) Bus width to the SPI bus used for write transfers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) $ref: /schemas/types.yaml#/definitions/uint32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) enum: [1, 2, 4, 8]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) default: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) spi-tx-delay-us:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) Delay, in microseconds, after a write transfer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) - compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) - reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) additionalProperties: true
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) - |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) spi@f00 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) reg = <0xf00 0x20>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) interrupts = <2 13 0 2 14 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) interrupt-parent = <&mpc5200_pic>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) ethernet-switch@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) compatible = "micrel,ks8995m";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) spi-max-frequency = <1000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) reg = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) codec@1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) compatible = "ti,tlv320aic26";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) spi-max-frequency = <100000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) reg = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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