Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) Binding for Qualcomm Atheros AR7xxx/AR9xxx SPI controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) - compatible: has to be "qca,<soc-type>-spi", "qca,ar7100-spi" as fallback.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) - reg: Base address and size of the controllers memory area
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) - clocks: phandle of the AHB clock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) - clock-names: has to be "ahb".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) - #address-cells: <1>, as required by generic SPI binding.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) - #size-cells: <0>, also as required by generic SPI binding.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) Child nodes as per the generic SPI binding.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 	spi@1f000000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 		compatible = "qca,ar9132-spi", "qca,ar7100-spi";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 		reg = <0x1f000000 0x10>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 		clocks = <&pll 2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 		clock-names = "ahb";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 		#address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 		#size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	};