Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) * Marvell Armada 3700 SPI Controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) Required Properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) - compatible: should be "marvell,armada-3700-spi"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) - reg: physical base address of the controller and length of memory mapped
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)        region.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) - interrupts: The interrupt number. The interrupt specifier format depends on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 	      the interrupt controller and of its driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - clocks: Must contain the clock source, usually from the North Bridge clocks.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - num-cs: The number of chip selects that is supported by this SPI Controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - #address-cells: should be 1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) - #size-cells: should be 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	spi0: spi@10600 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 		compatible = "marvell,armada-3700-spi";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 		#address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 		#size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 		reg = <0x10600 0x5d>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 		clocks = <&nb_perih_clk 7>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 		interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 		num-cs = <4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	};