Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) OMAP2+ McSPI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) - compatible :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)   - "ti,am654-mcspi" for AM654.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)   - "ti,omap2-mcspi" for OMAP2 & OMAP3.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)   - "ti,omap4-mcspi" for OMAP4+.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) - ti,spi-num-cs : Number of chipselect supported  by the instance.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) - ti,hwmods: Name of the hwmod associated to the McSPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - ti,pindir-d0-out-d1-in: Select the D0 pin as output and D1 as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 			  input. The default is D0 as input and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 			  D1 as output.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) - dmas: List of DMA specifiers with the controller specific format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 	as described in the generic DMA client binding. A tx and rx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	specifier is required for each chip select.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) - dma-names: List of DMA request names. These strings correspond
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	1:1 with the DMA specifiers listed in dmas. The string naming
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	is to be "rxN" and "txN" for RX and TX requests,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	respectively, where N equals the chip select number.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) Examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) [hwmod populated DMA resources]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) mcspi1: mcspi@1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)     #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)     #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)     compatible = "ti,omap4-mcspi";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)     ti,hwmods = "mcspi1";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)     ti,spi-num-cs = <4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) [generic DMA request binding]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) mcspi1: mcspi@1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)     #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)     #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)     compatible = "ti,omap4-mcspi";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)     ti,hwmods = "mcspi1";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)     ti,spi-num-cs = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)     dmas = <&edma 42
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	    &edma 43
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	    &edma 44
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	    &edma 45>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)     dma-names = "tx0", "rx0", "tx1", "rx1";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) };