Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) * SPI (Serial Peripheral Interface)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) - cell-index : QE SPI subblock index.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 		0: QE subblock SPI1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 		1: QE subblock SPI2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) - compatible : should be "fsl,spi" or "aeroflexgaisler,spictrl".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) - mode : the SPI operation mode, it can be "cpu" or "cpu-qe".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) - reg : Offset and length of the register set for the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - interrupts : <a b> where a is the interrupt number and b is a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)   field that represents an encoding of the sense and level
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)   information for the interrupt.  This should be encoded based on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)   the information in section 2) depending on the type of interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)   controller you have.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) - clock-frequency : input clock frequency to non FSL_SOC cores
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) - cs-gpios : specifies the gpio pins to be used for chipselects.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)   The gpios will be referred to as reg = <index> in the SPI child nodes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)   If unspecified, a single SPI device without a chip select can be used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) - fsl,spisel_boot : for the MPC8306 and MPC8309, specifies that the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)   SPISEL_BOOT signal is used as chip select for a slave device. Use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)   reg = <number of gpios> in the corresponding child node, i.e. 0 if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)   the cs-gpios property is not present.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	spi@4c0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 		cell-index = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 		compatible = "fsl,spi";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 		reg = <4c0 40>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 		interrupts = <82 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 		interrupt-parent = <700>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 		mode = "cpu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 		cs-gpios = <&gpio 18 1		// device reg=<0>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 			    &gpio 19 1>;	// device reg=<1>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * eSPI (Enhanced Serial Peripheral Interface)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) - compatible : should be "fsl,mpc8536-espi".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) - reg : Offset and length of the register set for the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) - interrupts : should contain eSPI interrupt, the device has one interrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) - fsl,espi-num-chipselects : the number of the chipselect signals.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) - fsl,csbef: chip select assertion time in bits before frame starts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) - fsl,csaft: chip select negation time in bits after frame ends
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	spi@110000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 		#address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 		#size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 		compatible = "fsl,mpc8536-espi";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 		reg = <0x110000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 		interrupts = <53 0x2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 		interrupt-parent = <&mpic>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 		fsl,espi-num-chipselects = <4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 		fsl,csbef = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 		fsl,csaft = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 	};