Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) * Atmel Quad Serial Peripheral Interface (QSPI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) - compatible:     Should be one of the following:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 		  - "atmel,sama5d2-qspi"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 		  - "microchip,sam9x60-qspi"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) - reg:            Should contain the locations and lengths of the base registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)                   and the mapped memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) - reg-names:      Should contain the resource reg names:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)                   - qspi_base: configuration register address space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)                   - qspi_mmap: memory mapped address space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - interrupts:     Should contain the interrupt for the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) - clocks:         Should reference the peripheral clock and the QSPI system
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)                   clock if available.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) - clock-names:    Should contain "pclk" for the peripheral clock and "qspick"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)                   for the system clock when available.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) - #address-cells: Should be <1>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) - #size-cells:    Should be <0>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) spi@f0020000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	compatible = "atmel,sama5d2-qspi";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	reg = <0xf0020000 0x100>, <0xd0000000 0x8000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	reg-names = "qspi_base", "qspi_mmap";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	interrupts = <52 IRQ_TYPE_LEVEL_HIGH 7>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	clocks = <&pmc PMC_TYPE_PERIPHERAL 52>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	clock-names = "pclk";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	#address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	#size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	pinctrl-names = "default";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	pinctrl-0 = <&pinctrl_spi0_default>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	m25p80@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 		...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) };