^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) WM8962 audio CODEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) This device supports I2C only.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) - compatible : "wlf,wm8962"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) - reg : the I2C address of the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - spk-mono: This is a boolean property. If present, the SPK_MONO bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) of R51 (Class D Control 2) gets set, indicating that the speaker is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) in mono mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) - mic-cfg : Default register value for R48 (Additional Control 4).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) If absent, the default should be the register default.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) - gpio-cfg : A list of GPIO configuration register values. The list must
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) be 6 entries long. If absent, no configuration of these registers is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) performed. And note that only the value within [0x0, 0xffff] is valid.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) Any other value is regarded as setting the GPIO register by its reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) value 0x0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) wm8962: codec@1a {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) compatible = "wlf,wm8962";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) reg = <0x1a>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) gpio-cfg = <
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 0x0000 /* 0:Default */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 0x0000 /* 1:Default */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 0x0013 /* 2:FN_DMICCLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 0x0000 /* 3:Default */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 0x8014 /* 4:FN_DMICCDAT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 0x0000 /* 5:Default */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) >;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) };