Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) WM8960 audio CODEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) This device supports I2C only.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)   - compatible : "wlf,wm8960"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)   - reg : the I2C address of the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)   - wlf,shared-lrclk: This is a boolean property. If present, the LRCM bit of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 	R24 (Additional control 2) gets set, indicating that ADCLRC and DACLRC pins
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 	will be disabled only when ADC (Left and Right) and DAC (Left and Right)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 	are disabled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 	When wm8960 works on synchronize mode and DACLRC pin is used to supply
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	frame clock, it will no frame clock for captrue unless enable DAC to enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	DACLRC pin. If shared-lrclk is present, no need to enable DAC for captrue.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)   - wlf,capless: This is a boolean property. If present, OUT3 pin will be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	enabled and disabled together with HP_L and HP_R pins in response to jack
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	detect events.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)   - wlf,hp-cfg: A list of headphone jack detect configuration register values.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 		The list must be 3 entries long.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 		hp-cfg[0]: HPSEL[1:0] of R48 (Additional Control 4).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 		hp-cfg[1]: {HPSWEN:HPSWPOL} of R24 (Additional Control 2).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 		hp-cfg[2]: {TOCLKSEL:TOEN} of R23 (Additional Control 1).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)   - wlf,gpio-cfg: A list of GPIO configuration register values.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 		  The list must be 2 entries long.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 		  gpio-cfg[0]: ALRCGPIO of R9 (Audio interface)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 		  gpio-cfg[1]: {GPIOPOL:GPIOSEL[2:0]} of R48 (Additional Control 4).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) wm8960: codec@1a {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	compatible = "wlf,wm8960";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	reg = <0x1a>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	wlf,shared-lrclk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) };