^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) WM8741 audio CODEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) This device supports both I2C and SPI (configured with pin strapping
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) on the board).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) - compatible : "wlf,wm8741"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - reg : the I2C address of the device for I2C, the chip select
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) number for SPI.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) - diff-mode: Differential output mode configuration. Default value for field
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) DIFF in register R8 (MODE_CONTROL_2). If absent, the default is 0, shall be:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 0 = stereo
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 1 = mono left
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 2 = stereo reversed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 3 = mono right
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) wm8741: codec@1a {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) compatible = "wlf,wm8741";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) reg = <0x1a>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) diff-mode = <3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) };