^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) # SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) %YAML 1.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) ---
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) $id: http://devicetree.org/schemas/sound/sgtl5000.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) $schema: http://devicetree.org/meta-schemas/core.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) title: Freescale SGTL5000 Stereo Codec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) maintainers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - Fabio Estevam <festevam@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) const: fsl,sgtl5000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) "#sound-dai-cells":
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) const: 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) assigned-clock-parents: true
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) assigned-clock-rates: true
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) assigned-clocks: true
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) clocks:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) - description: the clock provider of SYS_MCLK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) VDDA-supply:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) description: the regulator provider of VDDA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) VDDIO-supply:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) description: the regulator provider of VDDIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) VDDD-supply:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) description: the regulator provider of VDDD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) micbias-resistor-k-ohms:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) description: The bias resistor to be used in kOhms. The resistor can take
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) values of 2k, 4k or 8k. If set to 0 it will be off. If this node is not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) mentioned or if the value is unknown, then micbias resistor is set to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 4k.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) $ref: "/schemas/types.yaml#/definitions/uint32"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) enum: [ 0, 2, 4, 8 ]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) micbias-voltage-m-volts:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) description: The bias voltage to be used in mVolts. The voltage can take
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) values from 1.25V to 3V by 250mV steps. If this node is not mentioned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) or the value is unknown, then the value is set to 1.25V.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) $ref: "/schemas/types.yaml#/definitions/uint32"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) enum: [ 1250, 1500, 1750, 2000, 2250, 2500, 2750, 3000 ]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) lrclk-strength:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) description: |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) The LRCLK pad strength. Possible values are: 0, 1, 2 and 3 as per the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) table below:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) VDDIO 1.8V 2.5V 3.3V
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 0 = Disable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 1 = 1.66 mA 2.87 mA 4.02 mA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 2 = 3.33 mA 5.74 mA 8.03 mA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 3 = 4.99 mA 8.61 mA 12.05 mA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) $ref: "/schemas/types.yaml#/definitions/uint32"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) enum: [ 0, 1, 2, 3 ]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) sclk-strength:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) description: |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) The SCLK pad strength. Possible values are: 0, 1, 2 and 3 as per the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) table below:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) VDDIO 1.8V 2.5V 3.3V
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 0 = Disable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 1 = 1.66 mA 2.87 mA 4.02 mA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 2 = 3.33 mA 5.74 mA 8.03 mA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 3 = 4.99 mA 8.61 mA 12.05 mA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) $ref: "/schemas/types.yaml#/definitions/uint32"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) enum: [ 0, 1, 2, 3 ]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) - compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) - reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) - "#sound-dai-cells"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) - clocks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) - VDDA-supply
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) - VDDIO-supply
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) additionalProperties: false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) - |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) i2c {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) codec@a {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) compatible = "fsl,sgtl5000";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) reg = <0x0a>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #sound-dai-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) clocks = <&clks 150>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) micbias-resistor-k-ohms = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) micbias-voltage-m-volts = <2250>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) VDDA-supply = <®_3p3v>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) VDDIO-supply = <®_3p3v>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) ...