Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) RT5677 audio CODEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) This device supports I2C only.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) - compatible : "realtek,rt5677".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) - reg : The I2C address of the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - interrupts : The CODEC's interrupt output.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) - gpio-controller : Indicates this device is a GPIO controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) - #gpio-cells : Should be two. The first cell is the pin number and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)   second cell is used to specify optional parameters (currently unused).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) - realtek,pow-ldo2-gpio : The GPIO that controls the CODEC's POW_LDO2 pin.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) - realtek,reset-gpio : The GPIO that controls the CODEC's RESET pin. Active low.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) - realtek,in1-differential
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) - realtek,in2-differential
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) - realtek,lout1-differential
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) - realtek,lout2-differential
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) - realtek,lout3-differential
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)   Boolean. Indicate MIC1/2 input and LOUT1/2/3 outputs are differential,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)   rather than single-ended.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) - realtek,gpio-config
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)   Array of six 8bit elements that configures GPIO.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)     0 - floating (reset value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)     1 - pull down
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)     2 - pull up
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) - realtek,jd1-gpio
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)   Configures GPIO Mic Jack detection 1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)   Select 0 ~ 3 as OFF, GPIO1, GPIO2 and GPIO3 respectively.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) - realtek,jd2-gpio
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) - realtek,jd3-gpio
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)   Configures GPIO Mic Jack detection 2 and 3.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)   Select 0 ~ 3 as OFF, GPIO4, GPIO5 and GPIO6 respectively.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) Pins on the device (for linking into audio routes):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)   * IN1P
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)   * IN1N
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)   * IN2P
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)   * IN2N
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)   * MICBIAS1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)   * DMIC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)   * DMIC2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)   * DMIC3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)   * DMIC4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)   * LOUT1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)   * LOUT2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)   * LOUT3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) rt5677 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 	compatible = "realtek,rt5677";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 	reg = <0x2c>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 	interrupt-parent = <&gpio>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 	interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_LEVEL_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 	gpio-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 	#gpio-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 	realtek,pow-ldo2-gpio =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 		<&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 	realtek,reset-gpio = <&gpio TEGRA_GPIO(BB, 3) GPIO_ACTIVE_LOW>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 	realtek,in1-differential = "true";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 	realtek,gpio-config = /bits/ 8  <0 0 0 0 0 2>;   /* pull up GPIO6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 	realtek,jd2-gpio = <3>;  /* Enables Jack detection for GPIO6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) };