^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) RT5668B audio CODEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) This device supports I2C only.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) - compatible : "realtek,rt5668b"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) - reg : The I2C address of the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) - interrupts : The CODEC's interrupt output.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) - realtek,dmic1-data-pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 0: dmic1 is not used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 1: using GPIO2 pin as dmic1 data pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 2: using GPIO5 pin as dmic1 data pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) - realtek,dmic1-clk-pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 0: using GPIO1 pin as dmic1 clock pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 1: using GPIO3 pin as dmic1 clock pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) - realtek,jd-src
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 0: No JD is used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 1: using JD1 as JD source
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) - realtek,ldo1-en-gpios : The GPIO that controls the CODEC's LDO1_EN pin.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) Pins on the device (for linking into audio routes) for RT5668B:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * DMIC L1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * DMIC R1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * IN1P
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * HPOL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * HPOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) rt5668 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) compatible = "realtek,rt5668b";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) reg = <0x1a>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) interrupt-parent = <&gpio>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) interrupts = <TEGRA_GPIO(U, 6) IRQ_TYPE_LEVEL_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) realtek,ldo1-en-gpios =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) realtek,dmic1-data-pin = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) realtek,dmic1-clk-pin = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) realtek,jd-src = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) };