^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) RT5665/RT5666 audio CODEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) This device supports I2C only.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) - compatible : One of "realtek,rt5665", "realtek,rt5666".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) - reg : The I2C address of the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - interrupts : The CODEC's interrupt output.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) - realtek,in1-differential
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) - realtek,in2-differential
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) - realtek,in3-differential
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) - realtek,in4-differential
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) Boolean. Indicate MIC1/2/3/4 input are differential, rather than single-ended.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) - realtek,dmic1-data-pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 0: dmic1 is not used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 1: using GPIO4 pin as dmic1 data pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 2: using IN2N pin as dmic2 data pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) - realtek,dmic2-data-pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 0: dmic2 is not used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 1: using GPIO5 pin as dmic2 data pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 2: using IN2P pin as dmic2 data pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) - realtek,jd-src
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 0: No JD is used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 1: using JD1 as JD source
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) - realtek,ldo1-en-gpios : The GPIO that controls the CODEC's LDO1_EN pin.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) Pins on the device (for linking into audio routes) for RT5659/RT5658:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * DMIC L1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * DMIC R1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * DMIC L2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * DMIC R2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * IN1P
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * IN1N
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * IN2P
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * IN2N
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * IN3P
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * IN3N
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * IN4P
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * IN4N
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * HPOL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * HPOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * LOUTL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * LOUTR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * MONOOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * PDML
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * PDMR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) rt5659 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) compatible = "realtek,rt5665";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) reg = <0x1b>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) interrupt-parent = <&gpio>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_LEVEL_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) realtek,ldo1-en-gpios =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) };