^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) RT5663 audio CODEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) This device supports I2C only.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) - compatible : "realtek,rt5663".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) - reg : The I2C address of the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - interrupts : The CODEC's interrupt output.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) - avdd-supply: Power supply for AVDD, providing 1.8V.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) - cpvdd-supply: Power supply for CPVDD, providing 3.5V.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) - "realtek,dc_offset_l_manual"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) - "realtek,dc_offset_r_manual"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) - "realtek,dc_offset_l_manual_mic"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) - "realtek,dc_offset_r_manual_mic"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) Based on the different PCB layout, add the manual offset value to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) compensate the DC offset for each L and R channel, and they are different
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) between headphone and headset.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) - "realtek,impedance_sensing_num"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) The matrix row number of the impedance sensing table.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) If the value is 0, it means the impedance sensing is not supported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) - "realtek,impedance_sensing_table"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) The matrix rows of the impedance sensing table are consisted by impedance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) minimum, impedance maximun, volume, DC offset w/o and w/ mic of each L and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) R channel accordingly. Example is shown as following.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) < 0 300 7 0xffd160 0xffd1c0 0xff8a10 0xff8ab0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 301 65535 4 0xffe470 0xffe470 0xffb8e0 0xffb8e0>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) The first and second column are defined for the impedance range. If the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) detected impedance value is in the range, then the volume value of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) third column will be set to codec. In our codec design, each volume value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) should compensate different DC offset to avoid the pop sound, and it is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) also different between headphone and headset. In the example, the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) "realtek,impedance_sensing_num" is 2. It means that there are 2 ranges of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) impedance in the impedance sensing function.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) Pins on the device (for linking into audio routes) for RT5663:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * IN1P
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * IN1N
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * IN2P
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * IN2N
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * HPOL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * HPOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) rt5663: codec@12 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) compatible = "realtek,rt5663";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) reg = <0x12>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) avdd-supply = <&pp1800_a_alc5662>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) cpvdd-supply = <&pp3500_a_alc5662>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) };