^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) RT274 audio CODEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) This device supports I2C only.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) - compatible : "realtek,rt274".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) - reg : The I2C address of the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) - interrupts : The CODEC's interrupt output.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) Pins on the device (for linking into audio routes) for RT274:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * DMIC1 Pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * DMIC2 Pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * MIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * LINE1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * LINE2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * HPO Pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * SPDIF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * LINE3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) rt274: codec@1c {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) compatible = "realtek,rt274";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) reg = <0x1c>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) };