^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) * Texas Instruments OMAP4+ Digital Microphone Module
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) - compatible: "ti,omap4-dmic"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) - reg: Register location and size as an array:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) <MPU access base address, size>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) <L3 interconnect address, size>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) - interrupts: Interrupt number for DMIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) - ti,hwmods: Name of the hwmod associated with OMAP dmic IP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) dmic: dmic@4012e000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) compatible = "ti,omap4-dmic";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) reg = <0x4012e000 0x7f>, /* MPU private access */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) <0x4902e000 0x7f>; /* L3 Interconnect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) interrupts = <0 114 0x4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) interrupt-parent = <&gic>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) ti,hwmods = "dmic";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) };