^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) # SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) %YAML 1.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) ---
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) $id: http://devicetree.org/schemas/sound/mt6359.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) $schema: http://devicetree.org/meta-schemas/core.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) title: Mediatek MT6359 Codec Device Tree Bindings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) maintainers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - Eason Yen <eason.yen@mediatek.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - Jiaxin Yu <jiaxin.yu@mediatek.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - Shane Chien <shane.chien@mediatek.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) description: |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) The communication between MT6359 and SoC is through Mediatek PMIC wrapper.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) For more detail, please visit Mediatek PMIC wrapper documentation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) Must be a child node of PMIC wrapper.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) mediatek,dmic-mode:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) $ref: /schemas/types.yaml#/definitions/uint32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) description: |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) Indicates how many data pins are used to transmit two channels of PDM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) signal. 0 means two wires, 1 means one wire. Default value is 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) enum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) - 0 # one wire
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) - 1 # two wires
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) mediatek,mic-type-0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) $ref: /schemas/types.yaml#/definitions/uint32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) description: |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) Specifies the type of mic type connected to adc0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) enum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) - 0 # IDLE - mic in turn-off status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) - 1 # ACC - analog mic with alternating coupling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) - 2 # DMIC - digital mic
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) - 3 # DCC - analog mic with direct couping
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) - 4 # DCC_ECM_DIFF - analog electret condenser mic with differential mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) - 5 # DCC_ECM_SINGLE - analog electret condenser mic with single mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) mediatek,mic-type-1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) $ref: /schemas/types.yaml#/definitions/uint32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) description: |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) Specifies the type of mic type connected to adc1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) mediatek,mic-type-2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) $ref: /schemas/types.yaml#/definitions/uint32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) description: |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) Specifies the type of mic type connected to adc2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) additionalProperties: false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) - |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) mt6359codec: mt6359codec {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) mediatek,dmic-mode = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) mediatek,mic-type-0 = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) ...