Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) MT2701 with CS42448 CODEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) - compatible: "mediatek,mt2701-cs42448-machine"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) - mediatek,platform: the phandle of MT2701 ASoC platform
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) - audio-routing: a list of the connections between audio
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) - mediatek,audio-codec: the phandles of cs42448 codec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) - mediatek,audio-codec-bt-mrg the phandles of bt-sco dummy codec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) - pinctrl-names: Should contain only one value - "default"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - pinctrl-0: Should specify pin control groups used for this controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - i2s1-in-sel-gpio1, i2s1-in-sel-gpio2: Should specify two gpio pins to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 					control I2S1-in mux.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 	sound:sound {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 		compatible = "mediatek,mt2701-cs42448-machine";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 		mediatek,platform = <&afe>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 		/* CS42448 Machine name */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 		audio-routing =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 			"Line Out Jack", "AOUT1L",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 			"Line Out Jack", "AOUT1R",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 			"Line Out Jack", "AOUT2L",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 			"Line Out Jack", "AOUT2R",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 			"Line Out Jack", "AOUT3L",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 			"Line Out Jack", "AOUT3R",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 			"Line Out Jack", "AOUT4L",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 			"Line Out Jack", "AOUT4R",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 			"AIN1L", "AMIC",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 			"AIN1R", "AMIC",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 			"AIN2L", "Tuner In",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 			"AIN2R", "Tuner In",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 			"AIN3L", "Satellite Tuner In",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 			"AIN3R", "Satellite Tuner In",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 			"AIN3L", "AUX In",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 			"AIN3R", "AUX In";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 		mediatek,audio-codec = <&cs42448>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 		mediatek,audio-codec-bt-mrg = <&bt_sco_codec>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 		pinctrl-names = "default";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 		pinctrl-0 = <&aud_pins_default>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 		i2s1-in-sel-gpio1 = <&pio 53 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 		i2s1-in-sel-gpio2 = <&pio 54 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	};