Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) MAX98090 audio CODEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) This device supports I2C only.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) - compatible : "maxim,max98090" or "maxim,max98091".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) - reg : The I2C address of the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - interrupts : The CODEC's interrupt output.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) - clocks: The phandle of the master clock to the CODEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) - clock-names: Should be "mclk"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) - #sound-dai-cells : should be 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) - maxim,dmic-freq: Frequency at which to clock DMIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) - maxim,micbias: Micbias voltage applies to the analog mic, valid voltages value are:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	0 - 2.2v
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	1 - 2.55v
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	2 - 2.4v
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	3 - 2.8v
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) Pins on the device (for linking into audio routes):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)   * MIC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)   * MIC2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)   * DMICL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)   * DMICR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)   * IN1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)   * IN2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)   * IN3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)   * IN4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)   * IN5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)   * IN6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)   * IN12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)   * IN34
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)   * IN56
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)   * HPL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)   * HPR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)   * SPKL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)   * SPKR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)   * RCVL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)   * RCVR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)   * MICBIAS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) audio-codec@10 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 	compatible = "maxim,max98090";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	reg = <0x10>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 	interrupt-parent = <&gpio>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	interrupts = <TEGRA_GPIO(H, 4) IRQ_TYPE_LEVEL_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) };