^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) Everest ES8311 audio CODEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) - compatible: "everest,es8311"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) - reg: the I2C address of the device for I2C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) - spk-ctl-gpios: control spk enable/disable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - clocks: The phandle of the master clock to the CODEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - clock-names: Should be "mclk"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - adc-pga-gain: The PGA Gain of ADC, the value range is: 0(0dB) ~ 10(30dB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) the step is 3dB.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) - adc-volume: The volume of ADC, range is: 0x00(-95dB) ~ 0xff(+32dB), 0dB is 0xbf.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) - dac-volume: The volume of DAC, range is: 0x00(-95dB) ~ 0xff(+32dB), 0dB is 0xbf.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) - aec-mode: The string of description AEC path between ADC and DAC, It should be:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) "adc left, adc right",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) "adc left, null right",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) "null left, adc right",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) "null left, null right",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) "dac left, adc right",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) "adc left, dac right",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) "dac left, dac right"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) And aec-mode is "adc left, adc right" by default, if the property
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) is not specified.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) es8311: es8311@18 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) compatible = "everest,es8311";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) reg = <0x18>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) clocks = <&cru MCLK_I2S0_TX_OUT2IO>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) clock-names = "mclk";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) adc-pga-gain = <0>; /* 0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) adc-volume = <0xbf>; /* 0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) dac-volume = <0xbf>; /* 0dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) aec-mode = "dac left, adc right";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) spk-ctl-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) };