Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) DesignWare I2S controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  - compatible : Must be "snps,designware-i2s"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  - reg : Must contain the I2S core's registers location and length
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  - clocks : Pairs of phandle and specifier referencing the controller's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)    clocks. The controller expects one clock: the clock used as the sampling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)    rate reference clock sample.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  - clock-names : "i2sclk" for the sample rate reference clock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  - dmas: Pairs of phandle and specifier for the DMA channels that are used by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)    the core. The core expects one or two dma channels: one for transmit and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)    one for receive.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)  - dma-names : "tx" for the transmit channel, "rx" for the receive channel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)  - interrupts: The interrupt line number for the I2S controller. Add this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)    parameter if the I2S controller that you are using does not support DMA.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) For more details on the 'dma', 'dma-names', 'clock' and 'clock-names'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) properties please check:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	* resource-names.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	* clock/clock-bindings.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	* dma/dma.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	soc_i2s: i2s@7ff90000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 		compatible = "snps,designware-i2s";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 		reg = <0x0 0x7ff90000 0x0 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 		clocks = <&scpi_i2sclk 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 		clock-names = "i2sclk";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 		#sound-dai-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 		dmas = <&dma0 5>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 		dma-names = "tx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	};